Changing the Pulse Width of an Internally-Generated REQ Signal

Page 3-1 of the 653x User Manual states that you can programmatically change the pulse width of the internal REQ signal in pattern I/O mode. This example demonstrates this feature.

You can only use this VI with digital I/O devices that have an onboard clock, such as the 653x series (DIO-32HS). This VI acquires data from one or more digital ports at a specified rate.

This example VI calls the advanced digital VIs.

INSTRUCTIONS:
1. Enter the device number, channels, clock frequency, clock source, and buffer size.
2. Make the appropriate I/O connections as explained below.
3. Run the VI.

KEY PARAMETERS THAT ENABLE THIS TASK:
* DIO Config.vi: buffer size, group direction and port list.
* Digital Clock Config.vi: alternate clk rate spec, clock source.
* Digital Buffer Control.vi: control code, # scan/update.
* DIO Start.vi: handshaking source, clock frequency.
* DIO Read.vi
* DIO Clear.vi

NOTE: The data returned by the DIO Read vi is interleaved port by port, such as (in the case of 2 ports):
[1st port 1st data][2nd port 1st data][1st port 2nd data]...

NOTE: This VI is designed to work with any number of ports in the port list. However, certain devices have port list restrictions. Valid port lists are as follows for DIO-32HS and 653x devices:

0
2
0:1
2:3
0:3

I/O CONNECTIONS OVERVIEW:
Connect the data lines of the ports you specified in the port list to the data lines of the external device.

The internal clock is the clock source in this example, with the clock signal output on the REQ pin of the I/O connector.

For more details about specific I/O pins and timing specifications, refer to your hardware user manual.

Requirements

Filename: 2126.vi

Software Requirements

Application Software: LabVIEW Full Development System 6.0
Language(s): LabVIEW

Hardware Requirements

Hardware Group: Multifunction DAQ (MIO)
Driver: Traditional NI-DAQ (Legacy) 6.9.1

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