DAQ-STC: Generating a Finite Pulse Train (Easy-Level VIs)
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This VI generates a finite pulse train on the OUT pin of the chosen counter. This VI works with devices that have a DAQ-STC counter timer chip. Examples of these devices are the PXI-6070, PCI-MIO-16E-1, and AT-MIO-16E-2.
INSTRUCTIONS:
1. Enter the device number of your board.
2. Enter the counter number.
3. Enter the number of pulses to be generated.
4. Enter your desired frequency and duty cycle.
5. Choose the pulse polarity.
6. Make the appropriate I/O connections as explained below.
7. Run the VI. The pulse train will be generated on the OUT pin of your chosen counter.
KEY PARAMETERS:
This VI uses two counters and the Easy level Generate Pulse Train.vi to produce a finite pulse train on the chosen counter. The chosen counter is set up to generate pulses while its gate input is high. Counter-1 is used to provide the gate pulse of the duration needed for the chosen number of pulses. The Wait+ (ms).vi is used as a delay before the counters are reset. Finally, the Intermediate level Counter Stop.vi stops the generation and resets the counters.
If the duty cycle is set to 0.0 or 1.0, the closest achievable duty cycle is used to generate a train of positive or negative impulses
The "actual parameters" outputs may differ from your desired inputs because the pulse train is obtained by dividing down a timebase by a whole number. It may be that your exact desired frequency cannot be obtained.
Duty cycle is the ratio of the second phase of the pulse to the period of one pulse.
I/O CONNECTIONS:
Connect the OUT pin of counter-1 to the GATE pin of your chosen counter.
Connect to the OUT pin of your chosen counter for the finite pulse train.
If you change the gate mode (an input to Generate Pulse Train.vi on the diagram) to other than "ungated/software start", wire your external gate signal to the GATE pin of your chosen counter.
To find counter-1 to counter relationships, see the Counting Signals Highs and Lows chapter of the Data Acquisition Basics Manual.
To find the actual pin numbers, refer to the hardware user manual.
DAQ VIs USED:
Generate Pulse Train.vi, Counter Stop.vi.
Filename: 2168.zip
Application Software: LabVIEW Full Development System 5.0.1
Language(s): LabVIEW
Hardware Group: Multifunction DAQ (MIO)
Driver: Traditional NI-DAQ (Legacy)
INSTRUCTIONS:
1. Enter the device number of your board.
2. Enter the counter number.
3. Enter the number of pulses to be generated.
4. Enter your desired frequency and duty cycle.
5. Choose the pulse polarity.
6. Make the appropriate I/O connections as explained below.
7. Run the VI. The pulse train will be generated on the OUT pin of your chosen counter.
KEY PARAMETERS:
This VI uses two counters and the Easy level Generate Pulse Train.vi to produce a finite pulse train on the chosen counter. The chosen counter is set up to generate pulses while its gate input is high. Counter-1 is used to provide the gate pulse of the duration needed for the chosen number of pulses. The Wait+ (ms).vi is used as a delay before the counters are reset. Finally, the Intermediate level Counter Stop.vi stops the generation and resets the counters.
If the duty cycle is set to 0.0 or 1.0, the closest achievable duty cycle is used to generate a train of positive or negative impulses
The "actual parameters" outputs may differ from your desired inputs because the pulse train is obtained by dividing down a timebase by a whole number. It may be that your exact desired frequency cannot be obtained.
Duty cycle is the ratio of the second phase of the pulse to the period of one pulse.
I/O CONNECTIONS:
Connect the OUT pin of counter-1 to the GATE pin of your chosen counter.
Connect to the OUT pin of your chosen counter for the finite pulse train.
If you change the gate mode (an input to Generate Pulse Train.vi on the diagram) to other than "ungated/software start", wire your external gate signal to the GATE pin of your chosen counter.
To find counter-1 to counter relationships, see the Counting Signals Highs and Lows chapter of the Data Acquisition Basics Manual.
To find the actual pin numbers, refer to the hardware user manual.
DAQ VIs USED:
Generate Pulse Train.vi, Counter Stop.vi.
Requirements
Filename: 2168.zip
Software Requirements
Application Software: LabVIEW Full Development System 5.0.1
Language(s): LabVIEW
Hardware Requirements
Hardware Group: Multifunction DAQ (MIO)
Driver: Traditional NI-DAQ (Legacy)
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