Direct Digital Synthesis Concept Example

8_Bit_DDS.vi Example

This example demonstrates the Direct Digital Synthesis mode of Waveform Generation and shows the relationship of the Accumulator and the Lookup Memory in determining which samples are sent to the DAC for every update of the clock. The example is made up of two parts: the Lookup Memory and the Accumulator. For now, assume the clock input to the Lookup Memory and the DDS from the 16 bit Counter is 1KHz. The Lookup Memory is made up of a 4-bit memory module, with one cycle of a Sine wave of 16 points saved. The Lookup Memory passes the respective amplitude value to the DAC corresponding to the 4-bit address on its address lines. The Accumulator is basically an 8-bit counter, with the ability to count according to the Frequency Control Word (FCW). If the FCW is 7, the Accumulator counts by 7s (0, 7, 14, 21, 28, and so on). The high 4 bits (bits 4, 5, 6, 7) are hard-wired to the Lookup Memory, providing the addressing for each value that is passed to the DAC. Upon reaching the upper limit of the 8-bit counter, the counter wraps around and counts up from 0 again. For example, an 8-bit counter counts from 0 to 255. For example, if the current value in the counter is 253, and the Frequency Control word is 7, then the next number in the counter is 4.

Requirements

Filename: 8_bit_dds.vi

Software Requirements

Application Software: LabVIEW Full Development System 5.1.1
Language(s): LabVIEW

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informative and quit impressive
- Nov 21, 2005