RS-232 Interface using LabVIEW FPGA module

These examples are a simple implementation of an RS-232 interface using the LabVIEW FPGA Module.

They support basic serial communication without any hardware flow control. You can select the baudrate, number of data bits (5-8), parity and stop bit through parameters in the FPGA VIs.

The LabVIEW host examples, running on a Windows or RT target, test the read and write mode by communicating with the FPGA through one of the serial ports on the PXI controller. To properly connect the RS-232 port of the PXI controller to the IO connector of the NI PXI-7831R device, you must use a level translator which converts the voltage levels of the RS-232 port to the 3.3V TLL levels of the DIO lines on the NI PXI-7831R device.

Instructions (also included in the VIs)
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FPGA Serial Write
- Connect RIO Connector 0 DIO 0 (pin36) to RS-232 pin 2.
- Connect RIO Connector DIO Ground (pin 2) to RS-232 ground (shield of the RS-232 connector).
- Run the application.
- Set a string to write and click the Write button.
- Click the Read button. You should read back the same string you previously wrote out.

FPGA Serial Read
Note: You must use a signal translator to convert the RS-232 voltage levels to TTL voltage levels acceptable by the NI PXI-7831R device.
- Connect RIO Connector 0 DIO 1 (pin 37) to RS-232 pin 3 through a signal/level translator.
- Connect RIO Connector DIO Ground (pin 2) to RS-232 ground (shield of the RS-232 connector).
- Run the application.
- Set a string to write and click the Write button.
- Click the Read button. You should read back the same string you previously wrote out.

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The attached files contain both a LabVIEW 7.0 version of this example and a LabVIEW 8.2 version of the code.  The LabVIEW 8.2 version of the code is created within the LabVIEW project framework.

Requirements

Filename: fpgaserialwrite.llb

Software Requirements

Application Software: LabVIEW Full Development System 7.0
Toolkits and Add-Ons: LabVIEW FPGA Module 1.0
Language(s): LabVIEW

Hardware Requirements

Hardware Group: Reconfigurable I/O (RIO)
Hardware Model: PXI-7831R, PCI-7831R
Driver: NI-RIO 1.0, NI-VISA 3.0

Filename: fpgaserialread_82_project.zip

Software Requirements

Application Software: LabVIEW Full Development System 8.2
Toolkits and Add-Ons: LabVIEW FPGA Module 8.2
Language(s): LabVIEW

Hardware Requirements

Hardware Group: Reconfigurable I/O (RIO)
Hardware Model: PCI-7831R, PXI-7831R
Driver: NI-VISA 3.0, NI-RIO 1.0

Filename: fpgaserialwrite_82_project.zip

Software Requirements

Application Software: LabVIEW Full Development System 8.2
Toolkits and Add-Ons: LabVIEW FPGA Module 8.2

Hardware Requirements

Hardware Group: Reconfigurable I/O (RIO)

Filename: fpgaserialread.llb

Software Requirements

Application Software: LabVIEW Full Development System 7.0
Toolkits and Add-Ons: LabVIEW FPGA Module 1.0

Reader Comments | Submit a comment »

cRIO has RS-232 port
CompactRIO has a RS-232 port, I would imagine you can use the VISA drivers running on the RT processor to communicate using RS-232, this would solve the voltage level problem.
- Brian Mann, BAE Systems. brian.mann@selex-sas.com - Oct 18, 2006

Data Written Indicator
hi, the data written indicator is by default flase, so how will the data characters be written into the FPGA memory as the case will always be flase?... Any answers
- Mar 14, 2006