Retriggerable Finite Pause Trigger Digital Pulse Train Generation
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I. Description:
This example demonstrates how to generate a retriggerable finite digital pulse train from a Counter Output Channel and controlled by an external pause trigger. The Frequency, Duty Cycle, Delay from initial trigger, and Number of Output Pulses are all configurable.
This example shows how to configure the pulse in terms of Frequency/Duty Cycle, but it can be easily modified to generate a pulse in terms of Time or Ticks.
II. Instructions for Running:
1. Connect Counter 0 Out to Counter 1 Gate.
2. Set the desired Output Frequency in Hertz.
3. Set the desired output Duty Cycle.
3. Set the desired Offset Delay.
4. Set the Number of Output Pulses desired.
III. Block Diagram Steps for Counter 1:
1. Create a continuous pulse train generation Counter Output channel.
2. Setup the triggering for the acquisition. In this example, the output is only desired after an external trigger and set delay, so this property node pauses the output unless the output of Counter 0 is high.
3. Setup the timing for the acquisition. In this example, we want the pulse to be continuous.
4. Call the Start VI to start the acquisition.
5. Call the Is Task Done VI to monitor the program for errors. The while loop executes every 100ms to check for errors and if one is encountered the program will terminate.
6. Call the Clear Task VI to clear the task.
7. Use the popup dialog box to display an error, if any.
IV. Block Diagram Steps for Counter 0:
1. Create a Counter Output channel.
2. Define the parameters for a Digital Edge Start Trigger.
3. Call a channel property node to set the pulse to be retriggerable.
4. Call the Start VI to start the acquisition.
5. Call the Is Task Done VI to monitor the program for errors. The while loop executes every 100ms to check for errors and if one is encountered the program will terminate.
6. Call the Clear Task VI to clear the task.
7. Use the popup dialog box to display an error, if any.
V. I/O Connections Overview:
Counter 0 will output a pulse train used to gate the output of Counter 1. The final output will be sent to the default output terminal of Counter 1
Filename: 201744.vi
Application Software: LabVIEW Full Development System 7.0
Language(s): LabVIEW
Hardware Group: Multifunction DAQ (MIO)
Hardware Model: DAQCard-6023E
Driver: NI-DAQmx 7.0
This example demonstrates how to generate a retriggerable finite digital pulse train from a Counter Output Channel and controlled by an external pause trigger. The Frequency, Duty Cycle, Delay from initial trigger, and Number of Output Pulses are all configurable.
This example shows how to configure the pulse in terms of Frequency/Duty Cycle, but it can be easily modified to generate a pulse in terms of Time or Ticks.
II. Instructions for Running:
1. Connect Counter 0 Out to Counter 1 Gate.
2. Set the desired Output Frequency in Hertz.
3. Set the desired output Duty Cycle.
3. Set the desired Offset Delay.
4. Set the Number of Output Pulses desired.
III. Block Diagram Steps for Counter 1:
1. Create a continuous pulse train generation Counter Output channel.
2. Setup the triggering for the acquisition. In this example, the output is only desired after an external trigger and set delay, so this property node pauses the output unless the output of Counter 0 is high.
3. Setup the timing for the acquisition. In this example, we want the pulse to be continuous.
4. Call the Start VI to start the acquisition.
5. Call the Is Task Done VI to monitor the program for errors. The while loop executes every 100ms to check for errors and if one is encountered the program will terminate.
6. Call the Clear Task VI to clear the task.
7. Use the popup dialog box to display an error, if any.
IV. Block Diagram Steps for Counter 0:
1. Create a Counter Output channel.
2. Define the parameters for a Digital Edge Start Trigger.
3. Call a channel property node to set the pulse to be retriggerable.
4. Call the Start VI to start the acquisition.
5. Call the Is Task Done VI to monitor the program for errors. The while loop executes every 100ms to check for errors and if one is encountered the program will terminate.
6. Call the Clear Task VI to clear the task.
7. Use the popup dialog box to display an error, if any.
V. I/O Connections Overview:
Counter 0 will output a pulse train used to gate the output of Counter 1. The final output will be sent to the default output terminal of Counter 1
Requirements
Filename: 201744.vi
Software Requirements
Application Software: LabVIEW Full Development System 7.0
Language(s): LabVIEW
Hardware Requirements
Hardware Group: Multifunction DAQ (MIO)
Hardware Model: DAQCard-6023E
Driver: NI-DAQmx 7.0
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