Quadrature Encoder Simulator
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Filename: quadratureencodersimulator.llb
Requirements: View
- Reset
- Count UP to...
- Count DOWN to...
- Count UP continuously
- Count DOWN continuously
- Set Signals A & B (00)
- Set Signals A & B (01)
- Set Signals A & B (10)
- Set Signals A & B (11)
The code utilises 5 counters to simulate Quadrature Encoder Counts. No external connections are required between counters. Signal A appears on Pin 29 (CTR3 OUT). Signal B appears on Pin 26 (CTR4 OUT).
Counter 0 generates the timebase for the other three counters (via RTSI 1) and determines the rate at which the simulated quadrature encoder runs.
Counter 1 gates the timebase generator on CTR 0 (via RTSI 3), based on the number of rising edges of the timebaase have occured. This enables the Signal outputs to generate a finite number of counts.
Counter 2 is used as the gate for the counters 2 and 3 (via RTSI 2). It has a 25% duty cycle and is configured as 'Pulse Train Generation'.
Counters 3 and 4 generate Signals A and B respectively. They are configured as 'Retriggerable Pulse Generation' and pulse specifications set opposite to eachother to ensure the 90deg phase difference.
RTSI lines 1,2 and 3 are utilised in this function. Be sure that NO other devices are driving these RTSI lines.
Requirements
Filename: quadratureencodersimulator.llb
Software Requirements
Application Software: LabVIEW Full Development System 7.1
Language(s): LabVIEW
Hardware Requirements
Hardware Group: Counter/Timers (TIO)
Hardware Model: PXI-6602
Driver: Traditional NI-DAQ (Legacy) 7.3
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