Reference Example for Synchronized HSDIO Generation with Data Delay
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The accompanying code represents a very specific use case for NI products. For more general examples, please refer to ni.com/examples, the LabVIEW Example Finder, or the NI driver help files that come with every NI driver.
Downloads
Filename: synchronizedhsdiogeneration.zip
Requirements: View
This example shows how to synchronize two HSDIO 6562 cards using NI TCLK technology to achieve 100's of nanosecond synchronicity. This piece of code demonstrates the scalability of National Instrument's HSDIO platform, where one can simply add in more cards to achieve higher channel count while not sacrificing in the area of board to board skew. Another feature that is showcased in this example is the data delay feature, which allows users to specify up to 1 / 256 of a sample clock cycle (as low as 20ps control at 200 MHz sample clock rate).
Requirements
Filename: synchronizedhsdiogeneration.zip
Software Requirements
Application Software: LabVIEW Professional Development System 8.2
Hardware Requirements
Hardware Group: High-Speed Digital I/O
Hardware Model: PCI-6561, PXI-6652, PXI-6651, PCI-6562
Driver: NI-HSDIO 1.4
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This example program (this "program") was developed by a National Instruments Applications Engineer. National Instruments does not support this code or guarantee its quality in any way. THIS EXAMPLE PROGRAM IS PROVIDED "AS IS" WITHOUT WARRANTY OF ANY KIND AND SUBJECT TO CERTAIN RESTRICTIONS AS MORE SPECIFICALLY SET FORTH IN NI.COM'S TERMS OF USE (http://ni.com/legal/termsofuse/unitedstates/us/).