Using the NI cRIO-9151 With High Channel Count Applications

This example program is an example of using the NI cRIO-9151 and NI R Series boards for high channel count data acquisition.

This example shows how to use the NI-781xR RIO boards along with multiple NI cRIO-9151 and C Series modules to perform simultaneous, high channel-count acquisition.  The follow example uses the following hardware to acquire 60 channels at 50 kS/s/channel:

NI-7813R

4   NI cRIO - 9151 modules

12 NI-9237 C Series modules

2   NI-9215 C Series modules

1   NI-9233 C Series module

The FPGA VI acquires data and sends it to the host.  All 60 channels are in one I/O node.  The channels are grouped by module and built into arrays.  Each array of data is written to the DMA FIFO, where there is one FIFO for each module type.  While the overall bandwidth of the three FIFOs is aggregate, using all three FIFOs on the FPGA provides a more parallel architecture on the FPGA VI and also makes it easier to analyze the data on the host VI.  

The host VI uses a producer/consumer architecture to read data from the DMA FIFOs and do processing on the data.  The FIFOs on the host side are deep enough to store 50 kS/channel of data.  Each time the producer loop reads from the FIFO, it returns 25 kS/channel.  This is why the number of samples requested from the different FIFOs is multiplied by the number of channels in the respective FIFO.  In the consumer loop, the channels are broken out using the Decimate 1D Array VI.

Requirements

Filename: r-series_expansion.zip

Software Requirements

Toolkits and Add-Ons: LabVIEW FPGA Module 8.5.1
Language(s): LabVIEW

Hardware Requirements

Hardware Group: CompactRIO, Reconfigurable I/O (RIO)
Hardware Model: PXI-7813R
Driver: NI-RIO 2.4

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