NI CompactRIO Waveform Reference Library

The following installer contains host VIs, FPGA templates, and example projects for performing waveform data acquisition on NI RIO hardware. The configuration and acquisition VIs incorporate optimizations and best practices for the RIO platform, and you can easily modify the examples to jump-start your application development.

Downloads

Recommended Download: 
Get the cRIO Waveform Reference Library from the LabVIEW Tools Network.  The Tools Network allows for easy installation and automatically notifies you when new updates are released.

Alternative Download Options:
criowfm_305_installer.zip is palette based and is compatible with LabVIEW 2010 or later
crio_wfm_acq_271.zip does not install to user.lib and is compatible with LabVIEW 8.6 or later

Introduction

Many reconfigurable I/O (RIO) applications acquire continuous blocks of data from multiple synchronized NI C Series modules. This tutorial presents CompactRIO data acquisition VIs that incorporate RIO optimizations and best practices, and offers several examples to jump-start your application development.

Figure 1. Continuous Acquisition Example

Features

• VIs combine common acquisition functions into logical blocks, which support many different acquisition modes. Example programs demonstrate various flavors of continuous and finite acquisitions.
• VIs can present data with the NI LabVIEW waveform datatype to easily integrate with other common LabVIEW software components. The waveform datatype bundles the acquired data with its sampling period, timestamp, and channel properties (like channel name).
• VIs push calibration and scaling operations onto the field-programmable gate array (FPGA) to free host resources. Furthermore, the examples convert the FPGA's fixed-point (FXP) data into the single (SGL) datatype and encode each point as a U32 word. On the host, a type cast from U32 to SGL takes ~40 percent fewer CPU cycles than a conversion from FXP to SGL.
• VIs perform a full complement of error checking including DMA FIFO overflow (data buffer has filled up causing data to be dropped), module underflow (FPGA code execution takes too long, causing your module to sample slower than intended), and start/read/stop timeouts.
• Included Read functions use a polling architecture, which gives the user control over CPU usage during data acquisition.
• The examples are very flexible and can adapt to many different hardware combinations. For most applications, only the FPGA VI needs to be modified.

Palette Overview (LabVIEW 2010 and later)

The cRIO Wfm Library installs to the user.lib directory and appears under the User Libraries palette.

Figure 2: cRIO Wfm Reference Library Palette

Example projects are included for both Delta Sigma and SAR based NI C Series modules.  These projects are found at: 

National Instruments\LabVIEW [Version]\user.lib\cRIO Wfm\_exampleProjects

 

Example Project(s) Overview

Both DeltaSigma_Acquisition.lvproj and SAR_Acquisition.lvproj have the same five example programs and overall structure.  The only difference between the two projects is how the FPGA VI is timed.

You will likely need to move this example to another FPGA target and then use a "save as" on all VIs to avoid editing the examples.  For more information refer to ni.com/info and enter info code fpgaex.

Figure 3. Example Project Overview

1. The RT Templates (DS) section demonstrate various flavors of continuous and finite acquisition.
2. The FPGA section has the FPGA VI, the DMA Channel, and a PDF document describing how to customize the FPGA VI for your hardware configuration.

 

CompactRIO Waveform Acquisition VIs

rwfm_CreateChan.vi

• This VI's main responsibility is to collect and send scaling coefficients as well as channel count to the FPGA. The number of elements in "Channel Info" must equal the number of channels acquired by the FPGA.

rwfm_ConfigTiming(poly).vi

• This VI sets the sampling mode (either finite or continuous) and transfers sampling rate to the FPGA. Pay close attention to the polymorphic instance used by this VI. Some NI C Series modules support sample rates that are integer divisions of 51.2 kS/s and some support sample rates that are integer divisions of 50 kS/s. When you synchronize multiple delta-sigma modules together, the supported rates of all modules are equal to the supported rates of the master. Timebase sharing is configured by module in the LabVIEW project. If the overall data rate is not dictated by a delta-sigma-based C Series module, be sure to select the "Non Delta Sigma" instance of this VI.

rwfm_BufferCfg.vi

• This VI sets the host application's data buffer size, which is critical for achieving maximum data throughput. This buffer is responsible for receiving data coming from the DMA FIFO. For the continuous case, the buffer size should be many times larger than your read size. The examples configure this buffer to be 10X the read size, but it may be adjusted to fit the application. In the finite case, the timing VI automatically calls this VI and sets the buffer size to be exactly equal to the number of samples in the finite acquisition.

rwfm_Start.vi

• This VI starts the FPGA and waits for the FPGA to send an interrupt signifying that it is ready to begin the acquisition. This VI can be called multiple times to restart a paused acquisition or to retrigger a finite acquisition. If the Start is called more than once, it throws a harmless warning (code 61003) saying the FPGA is already running.

rwfm_Read(poly).vi

• This VI polls the host's data buffer at a user-specified rate until there is sufficient data to perform a Read operation. This VI can present the acquired data as a 1D Wfm SGL Array, a 2D Array of SGLs, or simply as a 1D Array of U32s. The 1D Array of U32s still contains all the calibration and scaling information applied by the FPGA, but the omission of type casting, array shaping, and waveform bundling provides the absolute fastest performance in terms of read times and data streaming.
• This VI also reports any errors from the FPGA, including timeouts, FIFO overflows, module underflows, or incorrect channel count.
• You may specify how many samples per channel are returned by the call to this VI. A value of -1 returns all available samples per channel.

rwfm_Stop.vi

• This VI sends a stop command to the FPGA's acquisition loop and waits for confirmation that the loop has indeed stopped. The VI also flushes the host's data buffer so subsequent acquisitions do not read old data.

Example Program Architectures

Finite Acquisition: The finite acquisition mode tells the FPGA to acquire a certain number of samples and then terminate the acquisition. In this acquisition mode, the rwfm_ConfigTiming VI calls rwfm_BufferConfig.vi and sets the host application's data buffer size equal to the number of points in the finite acquisition.

Finite Acquisition with Subset Reads: Again a finite acquisition allocates exactly enough memory to hold all of the requested samples per channel. The rwfm_Read(poly).vi has a control named Samps Read per Chan that you can use to specify the block size returned by each call, so you can read the finite acquisition in multiple subsets - a useful feature in many processing applications. 

Finite Acquisition with Rearming Software Start Trigger: When a finite acquisition terminates, the FPGA automatically rearms itself for another acquisition. You simply need to call rwfm_Start.vi to perform another finite acquisition.

Continuous Acquisition: The continuous acquisition mode tells the FPGA to acquire points indefinitely until a stop command is issued or until an error is encountered (FIFO overflow, module underflow, and so on). In this acquisition mode, explicitly call the appropriate rwfm_ConfigTiming VI and set the host application's data buffer to be many times larger than the read size. The examples use a 10X size by default. If the host application's data buffer fills, then the FPGA experiences a FIFO overflow causing the acquisition to stop.

Continuous Acquisition with Start/Stop or Pause Functionality: If a finite acquisition is too large for the amount of memory available on the host controller, then perform a continuous acquisition for a finite period of time via a state machine. When you call rwfm_Stop.vi, the FPGA stops the acquisition and immediately rearms itself waiting for rwfm_Start.vi to be called. The stop VI also flushes the host application's data buffer so subsequent acquisitions do not return old data.

 

Continuous Acquisition Benchmarks

For each of the controllers listed, the CompactRIO Continuous Acquisition Example acquired data continuously and streamed it to either a local technical data management streaming (TDMS) file, a local binary file, or a remote host through TCP/IP. The bandwidth values represent the amount of data that can be streamed indefinitely (or until the hard drive is filled).

Stream to Disk [TDMS]: sample rate = 51.2 kS/s

Datatype	9074 BW (MB/s)	9014 BW (MB/s)	9022 BW (MB/s)	9024 BW (MB/s)
1D Wfm SGL	6 chan (1.23)	8 chan (1.64)	10 chan (2.05)	15 chan (3.07)
2D Array SGL	7 chan (1.43)	10 chan (2.05)	13 chan (2.66)	19 chan (3.89)
1D Encoded U32	8 chan 1.64)	13 chan (2.66)	19 chan (3.89)	27 chan (5.53)

 

Stream to Disk [Binary]: sample rate = 51.2 kS/s

Datatype	9074 BW (MB/s)	9014 BW (MB/s)	9022 BW (MB/s)	9024 BW (MB/s)
1D Encoded U32	8 chan (1.64)	18 chan (3.69)	25 chan (5.12)	36 chan (7.37)

 

Stream over TCP/IP: sample rate = 51.2 kS/s

Datatype	9074 BW (MB/s)	9014 BW (MB/s)	9022 BW (MB/s)	9024 BW (MB/s)
1D Wfm SGL	12 chan (2.46)	12 chan (2.46)	16 chan (3.28)	29 chan (5.94)
2D Array SGL	13 chan (2.66)	14 chan (2.87)	20 chan (4.10)	32 chan (6.55)
1D Encoded U32	18 chan (3.69)	23 chan (4.71)	35 chan (7.17)	54 chan (11.08)

   

Related Links

Developer Zone: cRIO Vibration Data Logger Reference Design - A LabVIEW reference design with a focus on embedded vibration monitoring, data logging, communications, and headless configuration.

Developer Zone: Reference Applications for cRIO Order Analysis using a High Speed Tach - A LabVIEW reference design demonstrating how to acquire vibration and a tachometer at different rates and how to synchronize that data to perform order analysis.

Developer Zone: cRIO Reference Designs for Structural Health Monitoring - A LabVIEW reference design with a focus on structural health monitoring including shunt calibration and data logging.

Developer Zone: Fixed-Point (FXP) to Single (SGL) Conversion on LabVIEW FPGA - The FXP to SGL Conversion on FPGA source code is included in the above Developer Zone resource, but you can find the documentation and a separate download from this location.

 

Discussion and Feedback

This reference application was created by the NI Systems Engineering group. 

We do not regularly monitor Reader Comments posted on this page. Please submit your feedback to the CompactRIO Waveform Reference Applications discussion forum.

Requirements

Filename: criowfm_305_installer.zip

Software Requirements

Application Software: LabVIEW Full Development System 2010
Toolkits and Add-Ons: LabVIEW Real-Time Module 2010, LabVIEW FPGA Module 2010

Hardware Requirements

Hardware Group: CompactRIO
Driver: NI-RIO 3.5

Filename: crio_wfm_acq_271.zip

Software Requirements

Application Software: LabVIEW Full Development System 8.6
Toolkits and Add-Ons: LabVIEW Real-Time Module 8.6, LabVIEW FPGA Module 8.6
Language(s): LabVIEW

Hardware Requirements

Hardware Group: CompactRIO
Driver: NI-RIO 3.1

Reader Comments | Submit a comment »

Excellent.
- Sep 9, 2011