Reference Applications for cRIO Waveform Acquisition

The attached file contains examples and source code for performing waveform data acquisition on cRIO. The configuration and acquisition VIs incorporate RIO best practices and the examples can be easily modified to jump-start your application development.

Introduction

Many reconfigurable I/O (RIO) applications acquire continuous blocks of data from multiple synchronized NI C Series modules. This tutorial presents CompactRIO data acquisition VIs that incorporate RIO best practices, and offers several examples to jump-start your application development.

Figure 1: Continuous Acquisition Example

 

Features

• VIs combine common acquisition functions into logical blocks, which support many different acquisition modes. Example programs demonstrate continuous acquisition, finite acquisition, continuous acquisition with start/stop control, and finite acquisition with a rearming software trigger.
• VIs can present data with the NI LabVIEW waveform datatype to easily integrate with other common LabVIEW software components. The waveform datatype bundles the acquired data with its sampling period, timestamp, engineering units, dB references, and channel names.
• VIs push calibration and scaling operations onto the field-programmable gate array (FPGA) to free host resources. Furthermore, the examples convert the FPGA's fixed-point (FXP) data into the single (SGL) datatype and encodes each point as a U32 word. On the host, a type cast from U32 to SGL takes 35-40 percent less CPU cycles than a conversion from FXP to SGL.
• VIs perform a full complement of error checking including DMA FIFO overflow (data buffer has filled up causing data to be dropped), module underflow (FPGA code execution takes too long, causing your module to sample slower than intended), and start/read/stop timeouts.
• Included Read functions use a polling architecture, which gives the user control over CPU usage during data acquisition.
• The examples are very flexible and can adapt to many different hardware combinations. For most applications, only the FPGA VI needs to be modified.

 

Project Overview

cRIO Wfm Acq.lvproj includes examples for both Delta Sigma-based data acquisition (like the NI 9234, NI 9237, and NI 9229) and non-Delta-Sigma-based data acquisition (like the NI 9205).

Figure 2. Project Overview

1. The FPGA section has two main VIs. The Delta Sigma examples and the non-Delta-Sigma examples are referenced to their corresponding [FPGA]... Main VI.  
2. The [Shared] RT RIO Acq directory includes all the RIO Wfm SubVIs used to configure and perform data acquisition.
3. The Examples sections each demonstrate continuous acquisition, finite acquisition, continuous acquisition with start/stop control, and finite acquisition with a rearming software trigger.

 

CompactRIO Waveform Acquisition VIs

rwfm_CreateChan.vi

• This VI's main responsibility is to collect and send scaling coefficients as well as channel count to the FPGA. The number of elements in "Channel Info" must equal the number of channels acquired by the FPGA.

rwfm_ConfigTiming(poly).vi

• This VI sets the sampling mode (either finite or continuous) and transfers sampling rate to the FPGA. Pay close attention to the polymorphic instance used by this VI. Some NI C Series modules support sample rates that are integer divisions of 51.2 kS/s and some support sample rates that are integer divisions of 50 kS/s. When you synchronize multiple Delta Sigma modules together, the supported rates of all modules are equal to the supported rates of the master. Timebase sharing is configured by module in the LabVIEW project. If the overall data rate is not dictated by a Delta Sigma-based C Series module, be sure to select the "Non Delta Sigma" instance of this VI.

rwfm_BufferCfg.vi

• This VI sets the host application's data buffer size, which is critical for achieving maximum data throughput.  This buffer is responsible for receiving data coming from the DMA FIFO. For the continuous case, the buffer size should be many times larger than your read size. The examples configure this buffer to be 10x the read size, but it may be adjusted to fit the application. In the finite case, the timing VI automatically call this VI and sets the buffer size to be exactly equal to the number of samples in the finite acquisition.

rwfm_Start.vi

• This VI starts the FPGA and waits for the FPGA to send an interrupt signifying that it is ready to begin the acquisition. This VI can be called multiple times to restart a paused acquisition or to retrigger a finite acquisition. If the Start is called more than once, it throws a harmless warning (code 61003) saying the FPGA is already running.

rwfm_Read(poly).vi

• This VI polls the host's data buffer at a user specified rate until there is sufficient data to perform a Read operation. This VI can present the acquired data as a 1D Wfm SGL Array, a 2D Array of SGLs, or simply as a 1D Array of U32s. The 1D Array of U32s still contains all the calibration and scaling information applied by the FPGA, but the omission of type casting, array shaping, and waveform bundling provides the absolute fastest performance in terms of read times and data streaming.
• This VI also reports any errors from the FPGA, including timeouts, FIFO overflows, module underflows, or incorrect channel count.
• You may specify how many samples per channel are returned by the call to this VI.  A value of -1 will return all available samples per channel.

rwfm_Stop.vi

• This VI sends a stop command to the FPGA's acquisition loop and waits for confirmation that the loop has indeed stopped. The VI also flushes the host's data buffer so subsequent acquisitions do not read old data.

Example Program Architectures

Finite Acquisition:  The finite acquisition mode tells the FPGA to acquire a certain number of samples and then terminate the acquisition. In this acquisition mode, the rwfm_ConfigTiming VI calls rwfm_BufferConfig.vi and sets the host application's data buffer size equal to the number of points in the finite acquisition.

Finite Acquisition with Subset Reads:  Again a finite acquisition will allocate exactly enough memory to hold all of the requested samples per channel.  The rwfm_Read(poly).vi has a control named Samps Read per Chan which can be used to specify the block size returned by each call.  This allows you to read the finite acquisition in multiple subsets; a useful feature many processing applications. 

Finite Acquisition with Rearming Software Start Trigger: When a finite acquisition terminates, the FPGA automatically rearms itself for another acquisition. You simply need to call rwfm_Start.vi to perform another finite acquisition.

Continuous Acquisition:  The continuous acquisition mode tells the FPGA to acquire points indefinitely until a stop command is issued or until an error is encountered (FIFO overflow, module underflow, and so on). In this acquisition mode, explicitly call the appropriate rwfm_ConfigTiming VI and set the host application's data buffer to be many times larger than the read size. The examples use a 10x size by default. If the host application's data buffer fills, then the FPGA will experience a FIFO overflow causing the acquisition to stop.

Continuous Acquisition with Start/Stop or Pause Functionality: If a finite acquisition is too large for the amount of memory available on the host controller, then perform a continuous acquisition for a finite period of time. When you call rwfm_Stop.vi, the FPGA stops the acquisition and immediately rearms itself waiting for rwfm_Start.vi to be called. The stop VI also flushes the host application's data buffer so subsequent acquisitions do not return old data.

 

Continuous Acquisition Benchmarks

For each of the controllers listed, the CompactRIO Continuous Acquisition Example acquired data continuously and streamed it to either a local technical data management streaming (TDMS) file, a local binary file, or a remote host through TCP/IP. The bandwidth values represent the amount of data that can be streamed indefinitely (or until the hard drive is filled).

Stream to Disk [TDMS] : sample rate = 51.2 kS/s

Datatype	9074 BW (MB/s)	9014 BW (MB/s)	9022 BW (MB/s)	9024 BW (MB/s)
1D Wfm SGL	6 chan (1.23)	8 chan (1.64)	10 chan (2.05)	15 chan (3.07)
2D Array SGL	7 chan (1.43)	10 chan (2.05)	13 chan (2.66)	19 chan (3.89)
1D Encoded U32	8 chan 1.64)	13 chan (2.66)	19 chan (3.89)	27 chan (5.53)

 

Stream to Disk [Binary]: sample rate = 51.2 kS/s

Datatype	9074 BW (MB/s)	9014 BW (MB/s)	9022 BW (MB/s)	9024 BW (MB/s)
1D Encoded U32	8 chan (1.64)	18 chan (3.69)	25 chan (5.12)	36 chan (7.37)

 

Stream over TCP/IP: sample rate = 51.2 kS/s

Datatype	9074 BW (MB/s)	9014 BW (MB/s)	9022 BW (MB/s)	9024 BW (MB/s)
1D Wfm SGL	12 chan (2.46)	12 chan (2.46)	16 chan (3.28)	29 chan (5.94)
2D Array SGL	13 chan (2.66)	14 chan (2.87)	20 chan (4.10)	32 chan (6.55)
1D Encoded U32	18 chan (3.69)	23 chan (4.71)	35 chan (7.17)	54 chan (11.08)

   

What's New in Version 2.7

Version 2.7 is not backwards compatible with version 2.6.  Some controls have been added or moved to support new features.

• rwfm_Read(poly).vi has several new features and changes:
  • The VI has a new control called Samps Read per Chan.  You may now specify how many samples per channel are returned by each call to the Read VI.  This additional control allows you to read a finite acquisition in many small chunks and change the read block size during an acquisition.  Furthermore a value of -1 will return all available samples per channel.
  • The VI also changes the way it builds the 1D Wfm SGL datatype.  The first time this VI is called on a new acquisition, it builds the array of waveforms and uses a functional global variable to store them in memory.  Subsequent calls to the Read VI will just overwrite the timestamp and data components on the old waveforms instead of rebuilding each waveform from scratch.  This change improves overall read times by approximately 10%.
  • In addition to the overflow, underflow, and channel count error indicators, the Read VIs now check the FPGA Error Out indicator.  This is useful to determine if the NI C-Series module has been removed during an acquisition or has experienced a critical failure.
  • The RT data buffer backlog is now checked after the read is performed instead of immediately before.
• Changes to the top level FPGA templates:
  • The FPGA VI no longer stops the current acquisition when it experiences an overflow or underflow error.  Error indicators are latched and it is up to the host VIs to determine how to handle the error conditions.  This change gives the host application an ability to ignore error conditions and it can make troubleshooting easier.
  • A local variable has been added to initialize the ChanCheckSum error indicator.
• Fixed a bug where finite acquisitions were allocating too much memory
• rwfm_stop.vi now clears the RT Data buffer in many small chunks.  This approach uses less memory when trying to clear a very large backlog. 

 

Module Support and Known Issues

The cRIO Wfm VIs are intended to support all National Instruments C Series analog input modules except the NI 9233.  The 9233 sampling rate ring control uses different numerical values than all other delta sigma C Series modules (like the NI 9237 and the NI 9234).  As a result the rwfm_ConfigTiming(poly).vi incorrectly interprets both the intended sample rate and the waveform's dt.  If you would like support for the 9233 then modifications need to be made to this VI.

 

Related Links

Developer Zone:  Fixed-Point (FXP) to Single (SGL) Conversion on LabVIEW FPGA - The FXP to SGL Conversion on FPGA source code is included in the above Developer Zone resource, but you can find the documentation and a separate download from this location.

 

Discussion and Feedback

This reference application was created by the NI Systems Engineering group. 

We do not regularly monitor Reader Comments posted on this page. Please submit your feedback to the cRIO Waveform Reference Applications discussion forum.

 

 

Requirements

Filename: crio_wfm_acq_271.zip

Software Requirements

Application Software: LabVIEW Full Development System 8.6
Toolkits and Add-Ons: LabVIEW FPGA Module 8.6, LabVIEW Real-Time Module 8.6
Language(s): LabVIEW

Hardware Requirements

Hardware Group: CompactRIO
Driver: NI-RIO 3.1

Filename: crio_wfm_acq_260.zip

Software Requirements

Application Software: LabVIEW Full Development System 8.6
Toolkits and Add-Ons: LabVIEW FPGA Module 8.6, LabVIEW Real-Time Module 8.6
Language(s): LabVIEW

Hardware Requirements

Hardware Group: CompactRIO
Driver: NI-RIO 3.1

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