Continuous Pattern Input with Start and Stop Trigger - NI 653x
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This example program continually inputs data, starting and stopping on an external digital trigger. The NI 653x acquires data using pattern I/O, with the clock provided a counter pair on either an E Series or 660x device. The trigger signal is sent into one counter that starts and stops the clock, while the clock is generated by the other counter. The acquisition will begin on the rising edge of the first trigger pulse and stop on the rising edge of the second trigger pulse.
One counter is set up for gated pulse train generation; this is the pulse train that is used as the clock for the pattern input. The gate for this counter is generated b the other counter of the pair. This counter is set for simple event counting with an initial count of 1 and set to count down. The source for this counter is the trigger signal. When the first trigger comes in, the counter counts down to 0, the terminal count. When this happens, the output of the counter toggles high, this then starts the pulse train generation. When the second trigger comes in, the counter counts down to 2^n - 1, where n is the resolution of the counter. This toggles the output low again and stops the pulse train generation.
INSTRUCTIONS
Enter the device number of the E Series or NI 660x device and the NI 653x device
Select the ports to input on, frequency, buffer size, and scans to read at a time
Make the appropriate I/O connections as explained below.
Run the VI. To stop the VI before the stop trigger, click STOP.
The data written and read in is interleaved port by port, such as (in the case of 2 ports):
[1st port 1st data][2nd port 1st data][1st port 2nd data]
I/O CONNECTIONS OVERVIEW
Connect the output of counter 1, from either the E Series or NI 660x device, to the REQ1 connection of the NI 653x. Connect the trigger signal to the Source of Counter 0, from either the E-Series or NI 660x device.
NOTE
If you are using an NI 660x device to generate the clock, counters 0 and 1 are selected as the default counters. To use counters other than 0 and 1, you must specify which counters to use. The see the counter configuration controls, scroll left on the VI front panel. Valid counter pairs are listed below:
Valid Counter Pairs:
0 and 1
2 and 3
4 and 5
6 and 7
The maximum pattern acquisition clock frequency for NI E Series and 6601 devices is 5 MHz. For the NI 6602 or 6608, the maximum is 20 MHz.
The default input data ports on the 653x are 0 and 1. To use ports 2 and 3, change the port list on the front panel, and connect the clock signal to REQ2 instead of REQ1.
This VI can be modified for pattern iutput instead of pattern input by changing the DIO VIs on the block diagram. Use the Cont Pattern Output VI as a reference.
Filename: 1562.vi
Application Software: LabVIEW Full Development System 6.0
Language(s): LabVIEW
Hardware Group: Multifunction DAQ (MIO)
Driver: Traditional NI-DAQ (Legacy) 6.9.1
One counter is set up for gated pulse train generation; this is the pulse train that is used as the clock for the pattern input. The gate for this counter is generated b the other counter of the pair. This counter is set for simple event counting with an initial count of 1 and set to count down. The source for this counter is the trigger signal. When the first trigger comes in, the counter counts down to 0, the terminal count. When this happens, the output of the counter toggles high, this then starts the pulse train generation. When the second trigger comes in, the counter counts down to 2^n - 1, where n is the resolution of the counter. This toggles the output low again and stops the pulse train generation.
INSTRUCTIONS
Enter the device number of the E Series or NI 660x device and the NI 653x device
Select the ports to input on, frequency, buffer size, and scans to read at a time
Make the appropriate I/O connections as explained below.
Run the VI. To stop the VI before the stop trigger, click STOP.
The data written and read in is interleaved port by port, such as (in the case of 2 ports):
[1st port 1st data][2nd port 1st data][1st port 2nd data]
I/O CONNECTIONS OVERVIEW
Connect the output of counter 1, from either the E Series or NI 660x device, to the REQ1 connection of the NI 653x. Connect the trigger signal to the Source of Counter 0, from either the E-Series or NI 660x device.
NOTE
If you are using an NI 660x device to generate the clock, counters 0 and 1 are selected as the default counters. To use counters other than 0 and 1, you must specify which counters to use. The see the counter configuration controls, scroll left on the VI front panel. Valid counter pairs are listed below:
Valid Counter Pairs:
0 and 1
2 and 3
4 and 5
6 and 7
The maximum pattern acquisition clock frequency for NI E Series and 6601 devices is 5 MHz. For the NI 6602 or 6608, the maximum is 20 MHz.
The default input data ports on the 653x are 0 and 1. To use ports 2 and 3, change the port list on the front panel, and connect the clock signal to REQ2 instead of REQ1.
This VI can be modified for pattern iutput instead of pattern input by changing the DIO VIs on the block diagram. Use the Cont Pattern Output VI as a reference.
Requirements
Filename: 1562.vi
Software Requirements
Application Software: LabVIEW Full Development System 6.0
Language(s): LabVIEW
Hardware Requirements
Hardware Group: Multifunction DAQ (MIO)
Driver: Traditional NI-DAQ (Legacy) 6.9.1
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