Multirate Signal Processing

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Chapter 3 Multirate Signal Processing

Low complexity digital signal processing applications can be performed using a single

sampling rate for the whole implementation. For high complexity applications, sometimes

it is beneficial to alter the sampling rate used at different stages of the system to reduce

the required computational complexity and to enable the use of low-cost digital signal

processing structures. The implementation of a digital signal processing application using

variable sampling rates is called multirate digital signal processing.

3.1 Introduction

Multirate digital signal processing techniques can improve the flexibility of a software radio.

For instance, a multimode receiver may share the same ADC and sampling rate for

multiple receiver implementations. Yet there is an optimal sampling rate and resolution

for each of these standards. At the receiver, a signal is typically digitized at a rate significantly

higher than the bandwidth so that the anti-aliasing filter specifications can be

relaxed, but then the sampling rate is immediately reduced to the minimum sampling rate

to avoid excessive computation. Furthermore, it is desirable that the sample rate be exactly

some integer multiple of the symbol rate to ensure that the receiver is synchronized to the

incoming data; otherwise, symbols may be lost or counted twice. For a transmitter, the

signals are created at the minimum sampling rate to avoid excessive computation, but the

sampling rate is increased before the DAC to relax the specifications of the interpolation

filter.

3.1.1 Cost

In any system design, it is important to minimize the resources used by the system to

perform its intended application. For a computer-based design, the most critical parameter

is MIPS (millions of instructions per second). A system design that can deliver a desired

application using a minimal number of MIPS is generally less expensive and consumes

less power than a design that requires higher-performance hardware. Any technique that

will reduce the number of instructions needed to perform a task is a welcome addition to

Figure 3.1: Block Diagram of a Simplified Basestation Receiver.

an efficient system design. One of the most basic means of reducing the number of MIPS

used is tominimize the information content of the signal to be processed to only its essential

content.

An example of a multimode system is a basestation designed to handle multiple services.

The basestation can digitize the whole band of the reverse link and digitally extract

individual channels. The advantage of this approach is the need for only a single RF frontend

and ADC to service a whole spectrum of standards. On the forward link, signals can

be combined in the digital domain so that a single, common, RF front-end and DAC can be

used to service a sector. This implementation option can drastically reduce the cost of RF

components. Furthermore, since the cost of state-of-the-art, high-speed digital signal processing

chips rises exponentially with speed, the use of channelization (to lower sampling

rates) and parallel processing allows the use of lower-speed chips, significantly reducing

the implementation cost. Figure 3.1 shows an example of channelization where the task of

a basestation’s radio interface is to collect the signals transmitted by all mobile units and to

separate each channel for individual processing.

Each new data stream stemming from the original collected data stream has a lower

data rate than that of the original; if the original stream is k bps, each channelized stream

will be k/n, where n is the number of channels. The lower data rate at which each channel

transmits allows parallel implementation of less demanding algorithms, enabling the use of

less complex and potentially more power-efficient hardware.

3.1.2 Flexibility

At times, it is important for a systemto operate in several differentmodes. This need ismost

apparent in cellular phones designed to operate using different standards. For example,

the design specification may require a basestation to be able to handle IS-136 (30 kHz

channels), GSM (200 kHz), IS-95 (1.25 MHz channels), and WCDMA (5 MHz channels).

While each of these standards has different requirements, it is possible for a single system

to be able to handle all of them.

ADCs are usually subjected to a resolution versus speed trade-off. Higher-speed data

acquisition is usually achieved through the reduction of resolution; an eight-bit sample is

acquired faster than a twelve-bit sample. The use of multirate digital signal processing

techniques in a system design allows the designer to trade sample rate for data resolution.

For more details on analog to digital conversion, refer to Chapter 5.

3.1.3 Overview of the Chapter

The application of multirate techniques to a system design allows the designer significant

latitude in selecting the system’s cost, modes of operation, level of parallelism, and level

of quantization noise in the system. For these and other reasons, an understanding of the

multirate digital signal processing algorithms is necessary.

In Section 3.2, rate conversion principles applicable to upsampling and downsampling

will be presented. In Section 3.3, polyphase filters will be reviewed. Section 3.4 will

present a review of digital filter banks and will include examples of existing systems employing

multirate techniques. Section 3.5 applies multirate techniques to the problem of

symbol timing recovery. The chapter is concluded in Section 3.6.

Relevant NI products

Customers interested in this topic were also interested in the following NI products:

• RF and Communication Hardware and Software
  
• Other Modular Instruments (digital multimeters, digitizers, switching, etc...)
• LabVIEW Graphical Programming Environment

For the complete list of tutorials, return to the NI RF and Communications Fundamentals Main page.

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