Next Generation Data Acquisition – The New Technologies Powering M Series DAQ
Table of Contents
Overview
The new National Instruments M Series data acquisition (DAQ) devices set a new standard for DAQ hardware capabilities with a revolutionary architecture designed from the ground up. In addition to integrating the most advanced commercially available technology, the devices incorporate new design enhancements that provide dramatic improvements in performance, accuracy, and I/O channel density:- NI-STC 2 – Custom-designed system timing controller ASIC
- NI-MCal technology – Revolutionary calibration and linearization methodology
- NI-PGIA 2 technology – Custom-designed gain amplifiers
The NI-STC 2, an application-specific integrated circuit (ASIC) designed specifically for M Series DAQ devices, increases the number of I/O channels per device and improves the total data throughput rate by up to 1200 percent. NI-MCal technology is a linearization and calibration engine that delivers unparalleled accuracy improvements across all input ranges. In addition, NI-PGIA 2 amplifier technology is custom designed to provide better resolution at faster sampling rates. Three NI-PGIA 2 versions are optimized for cost, speed, and accuracy, respectively.

NI-STC 2 – Custom-Designed System Timing Controller ASIC
The NI-STC 2 is a custom-designed ASIC that controls the system timing, synchronization, and data routing functions of all input and output DAQ operations. The NI-STC 2 provides:
- 6 DMA channels – dedicated scatter-gather DMA controllers for each function
- Clocked digital I/O lines (up to 10 MHz)
- 32-bit counter/timers with encoder compatibility
- Generation and routing of RTSI bus signals for multidevice synchronization
- Generation and routing of internal and external timing signals
- PLL for clock synchronization
NI-STC 2 – Six DMA Channels
Many plug-in data acquisition devices are limited not by their acquisition or update rates, but by the rate at which they can transfer data to PC memory. Legacy DAQ devices use interrupt request lines (IRQ) to transfer data from the device to the PC, and require jumper configuration to avoid memory conflicts. IRQs use the computer processor to control the data transfer, which causes inefficiencies by blocking other operations from being processed by the PC. Modern DAQ devices include onboard direct memory access (DMA) channels through which data can be sent directly from the DAQ device to PC memory without processor involvement. DMA transfers are able to carry data at high speeds and keep the processor free to perform other tasks at the same time.
Next-generation DAQ devices, including those in the M Series family, have six DMA channels. With this technology built into the NI-STC 2 device system and timing controller, a single device can perform analog input, analog output, digital input, digital output, and two counter/timer operations simultaneously while leaving the PC processor free to execute other operations such as data scaling and analysis. Because most other DAQ devices have a single DMA channel, two or more operations being executed simultaneously require IRQs. As data transfer rates increase and as more operations are simultaneously performed, these IRQs begin to monopolize PC processor time, causing system slowdown and eventually generating buffer overflow errors. M Series DAQ devices with the NI-STC 2 can execute up to six operations simultaneously at high rates while minimizing the potential for error due to data loss or buffer overflows.

Figure 2. The NI-STC 2 has six DMA channels for significant increases in data throughput.
NI-STC 2 – Digital I/O and Counter/Timers
In addition to 16 static DIO lines, the NI-STC 2 includes up to 32 hardware-timed digital I/O lines, which can input or output digital patterns at rates up to 10 MHz. Each signal can be individually configured as a digital input, static output, or waveform output. The NI-STC 2 has dedicated FIFO buffers for digital input and output, each with a dedicated DMA channel to move data to and from the FIFO and PC memory. Groups of lines can be used to generate or measure patterns up to 32 bits wide. This pattern I/O capability is useful for applications including reading bar codes or reading analog-to-digital converters (ADCs) for component characterization, and is required for any application requiring more than a few milliseconds of timing accuracy.
The digital lines can also be correlated in time with other hardware-timed operations such as analog input, analog output, and counters to synchronize multiple operations on the device. To correlate signals, the NI-STC 2 internally routes an external or internal signal to provide a single clock source for the correlated signals.
All M Series DAQ devices include two 32-bit counter/timers for pulse generation and frequency measurements. Compared to common 24-bit counter/timer registers, M Series devices have 256 times the measurement capacity. In addition, an onboard 80 MHz timebase improves pulse measurement accuracy by 400%, and enables faster waveforms compared to the 20 MHz timebase common on legacy DAQ devices. You can use the counters to perform position measurements with quadrature encoders or 2-pulse encoders, and measure angular position with X1, X2, and X4 angular encoders.
NI-STC 2 – Timing and Synchronization
The NI-STC 2 generates several timebases by dividing down the 80 MHz master clock. These signals are used internally as clock sources for analog input, analog output, digital I/O, and counter/timers. From this 80 MHz clock, each M Series device also generates its own 10 MHz reference clock, which can be used to synchronize multiple devices. This 10 MHz reference clock is routed to other devices in the same system through the RTSI bus.
Traditionally, using RTSI bus to synchronize devices often limited the maximum clock rate of each device to 10 MHz. M Series devices, with the NI-STC 2, have a phase lock loop (PLL) that enables each device in the system to synchronize its own 80 MHz timebase to the master 10 MHz clock. With this technology, all devices are synchronized to the same master clock, but can use the faster 80 MHz timing signal generated onboard.

Figure 3. M Series devices generate an onboard 80 MHz clock and a PLL to synchronize multiple devices.
NI-MCal Technology – Calibration and Linearization Methodology
M Series devices incorporate NI-MCal technology, a patent-pending linearization and calibration engine that calibrates at thousands of voltage levels and at all input ranges. NI-MCal uses pulse width modulation (PWM) in conjunction with a high-precision voltage reference. The duty cycle of the PWM is used to vary the voltage level, so self-calibration is done at multiple points. Calibration constants are generated and stored in an onboard EEPROM to model the nonlinearity of the ADC and correct subsequent measurements.
The implementation of NI-MCal technology improves measurement accuracy by up to five times when compared to traditional 2-point calibration. Additionally, the improved precision reference featured on most M Series devices lowers the maintenance cost of the device by increasing the recommended calibration interval from one year to two years.
Table 1. M Series versus E Series Calibration
| M Series | Legacy E Series | |
| Type of calibration | Polynomial, all input ranges | Linear, one range |
| Typical self-calibration time | 7 s | 30 s |
| Calibration interval requirement | Up to 2 years | 1 year |
To ensure accurate measurements, NI designed the M Series with custom NI-PGIA 2 technology. The NI-PGIA 2 on each family of M Series devices is optimized for cost, speed, and accuracy. For example, the NI-PGIA 2 on the high-accuracy M Series family is optimized for 18-bit fast settling, low noise, and high linearity. NI-PGIA 2 technology improves accuracy by minimizing settling time, maintaining the specified resolution of the device even at maximum sampling rates. Figure 4 shows the high-speed family NI-PGIA 2 settling to virtually zero error in 1.5 µs following a 20 V step (worst-case scenario).

Figure 4. NI-PGIA 2 provides shorter settling times than legacy and off-the-shelf PGIA technologies.
More I/O and Additional Features
The digital lines on M Series devices have overvoltage, undervoltage, and overcurrent protection to prevent damage to the device and PC in the case that excessively high signals are accidentally connected to digital lines. Also, counter/timer lines have input filters to prevent digital bounce, common with industrial relays and switches. Both digital protection and counter/timer line filters are especially useful in industrial and control applications.
NI-DAQmx measurement services and driver software comes with all M Series devices. NI-DAQmx brings unprecedented advances in productivity and performance for DAQ applications. The integrated DAQ Assistant provides a step-by-step wizard utility for configuring, testing, and programming measurement tasks. In addition, NI-DAQmx is multithreaded, so that multiple operations can run simultaneously on a single processor.
M Series DAQ devices are designed to work seamlessly with IEEE 1451.4 smart sensors. Using M Series DAQ devices, NI signal conditioning, and NI-DAQmx measurement services software to read smart sensors, manual sensor data entry is replaced by automatically reading the electronic data sheet of a sensor and using it to scale sensor measurements.
Table 2 summarizes the differences between NI M Series and legacy E Series DAQ devices.
| M Series | E Series | ||
| AI | Channels | 16 or 32 | 16 or 64 |
| Sampling rate | Up to 1.25 MS/s (16-bit) | Up to 1.25 MS/s (12-bit) | |
| Resolution | 16 or 18-bit | 12 or 16-bit | |
| Calibration method | NI-MCal (all ranges) | Linear, 2-point (single range) | |
| Programmable lowpass input filters | Yes* | No | |
| AO | Channels | 0, 2, or 4 | 0 or 2 |
| Update rate | Up to 2.8 MS/s, 16-bit | Up to 333 kS/s, 16-bit | |
| Resolution | 16-bit | 12 or 16-bit | |
| Range | Programmable per channel* | ±10 V, 0 to 10 V | |
| Offset | Programmable per channel* | 0 V | |
| DIO | Lines | 24 or 48 | 8 or 32 |
| Rate | 10 MHz, clocked* | Software-timed | |
| Correlated DIO | Yes | No | |
| Line protection | Improved over/under voltage and overcurrent protection | — | |
| CTR | Lines | 2 | 2 |
| Resolution | 32-bit | 24-bit | |
| Counter timebase | 80 MHz | 20 MHz | |
| Quadrature encoder inputs | Yes | No | |
| Counter Debouncing Filters | Programmable per line | None | |
| System | Clock Synchronization | PLL, RTSI | RTSI |
| DMA Channels | 6 | 1 or 3 | |
| Connector Type | VHDCI (high density) | SCSI II |
The NI-STC 2, NI-MCal, and NI-PGIA 2 technologies provide features previously unavailable for plug-in DAQ devices, and the M Series works seamlessly with NI LabVIEW and NI-DAQmx measurement services software to provide more performance, more value, and more I/O.
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