Clocked Digital Generation, Acquisition, and Compare States Tutorial
Overview
This tutorial is part of the National Instruments Measurement Fundamentals series. Each tutorial in this series, will teach you a specific topic of common measurement applications, by explaining the theory and giving practical examples. This tutorial covers digital generation, acquisition, and compare types.
You can also view an interactive presentation (10min video) that takes you through this tutorial's material at your own pace.
For additional digital only concepts, refer to the Digital I/O Fundamentals Main page.
For the complete list of tutorials, return to the NI Measurement Fundamentals Main page.
Table of Contents
Choosing the Proper Digital Drive Type
Drive type describes the behavior of the generation channels. Single-ended high-speed digital waveform generator/analyzers support two drive types: active drive and open collector. In general, the generation drive type can be configured individually for each channel, and is available for dynamic and static operations. When configured for active drive generation, a channel generates the Generation Voltage High Level for logic 1, and the channel generates the Generation Voltage Low Level for logic 0. When configured for open-collector generation, a channel goes to the high-impedance state for logic 1. For open collector operations, external pull-up resistors are typically used to force a voltage for the logic high state.
Note: Some differential digital waveform generator/analyzers, such as the NI 656X devices, do not support open collector generation.
Drive type is a channel-based attribute; channels configured for open-collector output never force the Generation Voltage High Level in the line. Logic ones found in initial and idle states force the line to high-impedance for static and dynamic generations. The main application for open collector generation channels is bidirectional, mutidrop busses. Open-collector outputs prevent different gates from attempting to double-drive the line. By using a pull-up resistor the bus is high if all connected devices are high, and the bus is low if any device drives a zero. This setup is generally called wired-AND for positive-true logic and wired-OR for negative-true logic. Some examples of busses implemented with open-collector outputs include I2C and SMBus. Interfacing with a wired logic bus requires you to consider the voltages that will be generated at the bus. These voltages depend on four factors: value of the pull-up resistor, value to which the line is "pulled up", configured voltage for low state, and configured input impedance. The following diagram shows how these factors interact.
Figure 1. Diagram of a Digital Drive Connected to a Wired Logic Bus
Typical applications will have a generation voltage low of 0.0 V, and Rin as high impedance; Rpull must be carefully chosen to get the desired voltage values in the bus. Refer to your device specifications for the Rin for your device. Typical values for a pull-up resistor in I2C range between 2.4 kΩ and 3.9 kΩ.
Static vs Dynamic (Clocked) Generation
Static generation places a single pattern on the configured channels. Static generation, like static acquisition, is controlled by software and does not use hardware timing. Because a function call is required for each data point generated, static generation is generally used only for single-point or low-speed applications (< 1MHz). Static generation can be helpful in system and cable debugging, DC-level semiconductor testing, and many other applications. Static generation is also called immediate, unstrobed, or nonlatched generation.
Dynamic generation is a clocked operation where binary data is sent from the digital device to the DUT across multiple digital channels. The data can be generated based on complex scripts, and it can react to triggers, generate markers, and be shifted in time with respect to the generating clock. All user generation data patterns are stored to the device onboard memory as "waveforms" or “vectors.” These waveforms are arrays of every sample that the device will generate in the order they will be generated.
Generated waveforms are assigned a name when they are stored in onboard memory. This name allows you to store to or delete multiple waveforms from the device memory and refer to them easily for simple generation or for complex scripts. When the generation session is closed, the waveforms are removed from onboard memory.
Static vs Dynamic (Clocked) Acquisition
Static acquisition samples the configured channels once, reflecting the present state of the channels. Static acquisition, like static generation, is controlled by software, and does not use hardware timing. Because a function call is required for each data point acquired, static acquisition is generally used only for single-point or low-speed applications. Static acquisition can be helpful for system and cable debugging, DC-level semiconductor testing, and many other applications. Static acquisition is also called immediate, unstrobed, or nonlatched acquisition.
Dynamic acquisition is a clocked event in which digital data is transferred from the DUT into onboard memory. The logic state of each acquisition is determined by the configured data interpretation method, and the acquisition voltage levels are defined by your dynamic acquisition operation.
At every clock edge, the Pattern Acquisition Engine stores the current state of each DIO channel configured for dynamic acquisition into onboard memory as a sample. Samples are stored in the order they are received to onboard memory as a record. You can configure the number of samples per record. A record is a group of samples. Acquired data is stored into device onboard memory as a record. When configuring an acquisition session, you can determine how many samples are stored in a record. You can also acquire multiple unique records in a series; this process is known as multirecord acquisition. The Advance trigger initiates the acquisition of the additional records in a multirecord acquisition. The End of Record event indicates when a record acquisition is complete.
Digital Drive States (0, 1, and Z)
There are two logical states: 0 and 1. While for most digital systems this is true, there are actually more logical states than 0 and 1. Another logic state is ‘Z’ also referred to as “tri-state.” This is the state where the driver is not driving any value at all (please refer to Figure 2). To be clear, it is not equal to either 0 or 1. Physically the potential of the wire is floating at an unknown voltage level.

Figure 2. Common Digital Drive and Compare States
The most common use of the Z state is when it is used to test one or more digital lines that can be driven by multiple transmitters. The data port on a memory chip is a good example of this. When the computer writes into the memory device, the computer needs to drive the data to be written into the memory chip on the data pins of the memory device. Later, when the computer processor needs to read out the contents of the memory, the memory device needs to drive the previously stored data value back to the computer processor.
Initial and Idle States
The Initial state configures the state of the data generation channels after a session has been configured but before the device starts generating the waveform. The Initial state is often useful while the device is waiting for a Start trigger. The Idle state configures the state of the data generation channels after the waveform generation has begun and the generation has paused or stopped. The Initial state and Idle state are per channel selectable. You can select the following values on all digital waveform generator/analyzers for data generation channels:
1— Drive the channel to a high level.
0— Drive the channel to a low level.
X— Hold last value/Leave the channel at its current state.
Z— Put the channel in a high-impedance state.
Per Cycle Tristate
Some digital waveform generator/analyzers allow you to select between driving a 0 or a 1 during every active period of the Sample clock. To enable this functionality, you create waveforms composed of 0, 1, and Z values. For each sample in the waveform, you can select which channel to tristate by inserting Z values in the waveform at that location.
Figure 3. Example of a Digital Waveform Composed of 0, 1, and Z Values
Per cycle tristate is useful for communicating or testing bidirectional digital channels. For example, communicating with a memory device may require the generator to drive address and data channels during a write, but tristate the data channels during a read.
Note: At high-speeds, care must be taken when switching a channel from driving to receiving data to ensure the signal reflections resulting from tristating the channel do not affect the transmission.
View the National Instruments High-Speed Digital ATE and Stimulus Response Features tutorial for more information about digital drive and compare applications.
Digital Compare States (L, H, and X)
When acquiring there are three common states: L, H, and X. The “L” state means the devices is expecting a Logic Low. The “H” state means the digital devices is expecting a Logic High. The “X” state can mean different things depending on whether the device is generating or acquiring data. When the digital device is in acquisition mode, X means “don’t care”. This is most commonly used when, in a user application, you are comparing the DUT digital response to some theoretical value. You may know for instance that you are expecting the DUT to produce the pattern 0 1 0 0 1 0 1. But many times, the DUT may produce more samples that you actually care about. For example, if a PASS condition is defined as 0 1 to start the pattern followed by three samples of data that may change from time to time, followed by a trailing 0 1 – then you can use the don’t compare to compare the 0 1 0 0 1 0 1 against 0 1 X X X 0 1.
When the device is in generation mode, the X value means “whatever logical value you were previously transmitting – keep transmitting it.” This can be used in an application where at the start of the application – the user does not know what logic levels the transmitter was previously left in, but they need to continue in that state.
View the National Instruments High-Speed Digital ATE and Stimulus Response Features tutorial for more information about digital drive and compare applications.
Relevant NI Products
Customers interested in this topic were also interested in the following NI products:
- High-Speed Digital I/O
- Industrial Digital I/O
- Logic Analyzers
- Modular Instruments (digital multimeters, digitizers, switching, etc...)
- Digital Waveform Editor
- LabVIEW Graphical Programming Environment
- SignalExpress Interactive Software Environment
For the complete list of tutorials, return to the NI Measurement Fundamentals Main page
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