Developing Measurement and Control Applications with the LabVIEW FPGA Module and Reconfigurable I/O Devices

With the LabVIEW FPGA Module and reconfigurable I/O (RIO) hardware, National Instruments delivers an intuitive, accessible solution for incorporating the flexibility of FPGA technology into measurement and control systems. You use LabVIEW, a graphical development environment specifically designed for measurement and automation control applications, to configure an FPGA embedded on a National Instruments R Series RIO device, creating a high-performance, robust system. With this LabVIEW-based system, you can easily integrate image acquisition/analysis, motion control, and industrial communication, such as CAN and RS232. Applications addressed by the LabVIEW FPGA Module and R Series hardware include flexible encoder inputs, PWM signal I/O, PID control, custom counter implementation, digital protocol emulation, discrete control, and custom measurements.

Introduction

With the LabVIEW FPGA Module, you use graphical programming to configure the field programmable gate array (FPGA) on an NI R Series RIO device. Together, the LabVIEW FPGA Module and R Series devices provide a flexible platform for creating sophisticated measurement and control systems that were previously possible only with custom-designed hardware.

An FPGA is a chip that consists of many unconfigured logic gates. Unlike the fixed, vendor-defined functionality of an application-specific integrated circuit (ASIC) chip, you can configure and reconfigure the FPGA for each application. FPGAs are used in applications where the cost of developing and fabricating an ASIC is prohibitive, or the hardware must be reconfigured after being placed into service. Because FPGAs can be used for implementation of custom algorithms in hardware, they offer benefits such as precise timing and synchronization, rapid decision making, and simultaneous execution of parallel tasks. Today, FPGAs appear in such devices as instruments, consumer electronics, automobiles, aircraft, copy machines, and application-specific computer hardware. FPGAs are often used in products for measurement and control, but the end users of these systems generally do not want to develop their own FPGA-based systems. Configuring FPGAs has historically required expertise in VHDL programming or complex design tools used more by hardware design engineers than by test and control engineers.

Now with the LabVIEW FPGA Module, you can use LabVIEW – a graphical development environment designed specifically for measurement and control applications – to create measurement and control systems that take advantage of the benefits of FPGAs. No other design tool knowledge is required to configure the FPGA on the R Series device in the system. Because the LabVIEW FPGA Module executes your logic in hardware, your system can process and generate synchronized analog and digital signals rapidly and deterministically.

R Series RIO Devices

The first R Series device is the National Instruments PXI-7831R module. The NI PXI-7831R includes the following features:

• 8 Independent 16-bit analog inputs, 4.3 µs conversions
• 8 Independent 16-bit analog outputs, 1.0 µs updates
• 96 digital I/O lines
• Onboard Flash Memory
• LabVIEW-configurable FPGA
• PXI trigger interface for synchronizing two or more PXI-7831R modules
  
  You define the measurement and control functionality of the PXI-7831R by creating a LabVIEW VI and downloading it to the module. Figure 1 shows a high-level block diagram of the PXI-7831R. The user-configurable FPGA handles the timing, synchronization, and decision-making defined in your LabVIEW VI. The FPGA interfaces to the analog and digital I/O and to the NI MITE ASIC chip. The NI MITE interfaces with the PXI backplane to transfer data between the PXI-7831R and other modules on the PXI bus, such as other I/O modules and the controller.

You can use the LabVIEW FPGA Module to handle each of the I/O signal lines independently or to synchronize any lines with any other lines. The PXI-7831R global clock regulates the execution of all operations. All operations are timed by the PXI-7831R 40 MHz global clock, so you can achieve synchronization resolution of 25 ns. You can configure the DIO lines as custom counter/timers, PWM channels, or as ports for user-defined protocols. The flash memory on the PXI-7831R offers you the ability to store your module configuration and configure automatic loading and running when the module receives power.

There are several key differences between the PXI-7831R reconfigurable I/O module and data acquisition (DAQ) modules such as the National Instruments E Series. For example, an E Series device includes a fixed number of counter/timers and triggering functionality, handles waveforms, and uses high-level driver software with defined functions to control these operations. In contrast, the PXI-7831R offers a flexible number of counter/timers, and user-definable timing, triggering, and I/O synchronization. It also performs high-speed, single-point analog input and output, and provides low-level hardware control of the I/O.

With the LabVIEW FPGA Module, you configure the operation of the FPGA device by programming in LabVIEW. Your LabVIEW block diagram is implemented in hardware, which gives you direct control over the I/O of the PXI-7831R module. You can analyze and manipulate I/O signals in ways that are not possible with fixed I/O hardware. Figure 2 shows the block diagram for a simple rising-edge counter from one of the LabVIEW FPGA Module example programs. The fact that the U16 datatype is used makes this a 16-bit counter. On a typical DAQ board, the counter logic is implemented in a fixed ASIC chip such as the DAQ-STC, and you write your application using the NI-DAQ counter VIs. With the LabVIEW FPGA Module, however, you write your own counter implementation in LabVIEW, and configure your own counter “chip” on part of the FPGA. You would probably not implement a counter in this way with LabVIEW or even the LabVIEW Real-Time Module because a software-based counter would only be able to count very low-frequency edges. Because the LabVIEW FPGA Module uses the block diagram to implement your application in hardware, this counter has similar performance to the defined counters on a data acquisition device.


Figure 2. Sample LabVIEW FPGA Program – 16-Bit Counter


The LabVIEW FPGA Module is shipped with LabVIEW VI examples for a variety of common functions. These examples can be modified to meet the needs of your custom application. Some topics covered in the examples include the following:
• Pulse-width modulation (PWM)
• Timed, synchronized operations
• Custom counter and encoder interface
• Custom triggering methods

  Application Development Flow
  

Figure 3 shows the typical flow of developing your application. The first step is to develop the VI that will be deployed to your FPGA target on the PXI-7831R. Before you compile, you can test the FPGA VI by targeting the FPGA device emulator, which runs your algorithm on the host computer processor. After you develop, debug, and compile your FPGA VI, develop your host interface VI(s). You can use either a Windows computer or an RT target for your host computer. If you are using an RT target for your host computer, develop a separate user interface in LabVIEW for Windows.


Developing the FPGA VI
The first step in developing your application is to create the LabVIEW block diagram that will be used to configure the FPGA on the PXI-7831R. This is where you implement your logic for synchronizing signals, custom digital protocol communication, PWM communication, and onboard decision making for control and alarm handling. With the LabVIEW FPGA Module, you use the LabVIEW development environment and many of the same functions. As shown in Figure 4, the Functions palette is very similar to the All Functions palette when you target LabVIEW for Windows. There is an FPGA Device I/O palette instead of an NI-DAQ palette because NI-DAQ is not used with Reconfigurable I/O. The VIs on the Time & Dialog palette offer resolution selection of ms, µs, and ticks. As discussed previously, FPGA devices use a 40 MHz global clock, thus a tick is 25 ns. When creating your FPGA VI, you use the same basic program constructs—While Loops, For Loops, Case Structures, and Sequence structures—in the standard LabVIEW environment to create your application. Because floating-point operations are not available on the FPGA, the LabVIEW FPGA Module has fewer operators and analysis functions than the LabVIEW Full Development Software for Windows. In addition, there are no functions available for file I/O or ActiveX because there is no hard drive or operating system on the PXI-7831R module.


You have access to the LabVIEW FPGA palettes when you target either an FPGA device or the FPGA device emulator. The emulator uses the I/O of the RIO device but executes the logic on the host computer processor. You can verify the execution flow of your VI using the emulator, but you cannot achieve hardware determinism. Use the FPGA device emulator for the following tasks:

• To perform debugging. The emulator offers all the debugging tools of LabVIEW, such as execution highlighting, probes, and breakpoints with single-stepping, that are not available after compilation.
• To test your VI without waiting for it to compile.

Just as with other FPGA development tools, the compile step can take minutes to hours depending on application complexity and computer resources. When you need to test the FPGA VI with the speed and determinism of hardware performance, you must compile the FPGA VI rather than run the VI while targeting the FPGA device emulator. You begin compiling simply by clicking the Run button while LabVIEW targets an FPGA device.

Because the VI targeted to the PXI-7831R runs in hardware without the overhead of an operating system, execution is completely deterministic.

Developing the Host VI
After you create and debug your FPGA VI, you will create one or more VIs for host interaction. You can use either LabVIEW for Windows or LabVIEW Real-Time as your host for your PXI-7831R module. With LabVIEW for Windows, you can take advantage of Windows-related functions directly in the host VI(s), but your host application does not execute deterministically. LabVIEW Real-Time is a deterministic host that fully controls all the I/O in your system and communicates with LabVIEW for Windows running on your user interface machine. The host is where you perform floating-point operations such as FFTs or model-based control and simulation. When you install the LabVIEW FPGA Module, the FPGA Interface palette, shown in Figure 5, is installed as a subpalette of the All Functions palette available when you target LabVIEW for Windows or an RT device.


The FPGA Interface palette contains VIs for communicating with your FPGA VI and handling interrupts. By defining how your host VIs and your FPGA VI interact, you define your own driver-level software.

Developing Your User Interface Application
Your user interface application is where you will typically perform the tasks that are not time-critical, such as configuring system parameters, generating reports, and managing data. If your Windows computer is your host computer, you can use the same machine for your user interface. If you use an RT target for your host computer, you must create a Windows-based user interface on your Windows computer. Figure 6 shows the interaction between platforms in this type of system.

Another deployment option is to create an embedded system that does not require a user interface display or monitor. To create this option, you can use both the LabVIEW Real-Time Module and the LabVIEW FPGA Module.

Performance Benefits

Because the hardware itself runs the algorithms, performance is typically much better than that of software-based systems. For example, consider an application with eight PID control loops. Using an RT target to perform the eight PID calculations and the PXI-7831R simply for I/O, you can achieve a loop rate of 28 kHz. When you implement an integer-based PID algorithm on the FPGA of the PXI-7831R, you can achieve loop rate of 100 kHz for all eight loops. The speed limitation for executing the PID control loop on the PXI-7381R is due to the settling time of the A/D to 16 bits, not to the PID calculation. Control loops for digital I/O such as PWM can be performed at several MHz.

Another benefit of running your LabVIEW code on the FPGA on the PXI-7381R is that you can achieve true simultaneous, parallel processing. There is no operating system on the module that must divide CPU time between several tasks. For example, consider a LabVIEW block diagram with two parallel While Loops, each implementing a counter, as shown in Figure 2. This application actually creates two separate hardware processors on the FPGA that operate simultaneously but can be synchronized to the global clock. Even within the same While Loop or other structures you can achieve speed improvements by performing operations in parallel using a pipelining architecture. You can accomplish this in a LabVIEW block diagram by dividing up your processing and performing the pieces on subsequent iterations of your While Loop. In Figure 7 below, the control algorithm is divided into two pieces.
In Figure 7, each iteration of the While Loop updates the control output, but the AI and Control 1 operations are performed in parallel with the AO and Control 2 operations. The algorithm more quickly than an inline processing architecture would. This simultaneous, parallel processing would not be possible on a platform with a microprocessor and operating system.

Applications

By using the LabVIEW FPGA Module and the PXI-7831R module, you can create custom hardware to empower a wide variety of applications for many industries. Examples include discrete control and analog control for manufacturing and scientific research, and simulation for electronic control module (ECM) development.

Analog Control
There are many types of analog control applications that can benefit from the PXI-7381R and the LabVIEW FPGA Module. The analog input channels of the PXI-7381R are capable of sampling a 16-bit value every 4.3 µs, and the analog output channels can perform updates every 1.0 µs. Additionally, with the flexibility of the LabVIEW FPGA Module, you can implement common control algorithms, such as PID, as well as develop customized algorithms for your application. Some examples of analog control include the following:

• Dynamometer control (speed/load)
• Servo-hydraulic or electrodynamic shaker control
• Motor speed or position control

Simulation
In addition to performing as a complete control system as described previously, you can use the PXI-7381R in systems for rapid control prototyping (RCP) and hardware-in-the-loop simulation testing of controllers under development. Electronic controllers are common in many products such as vehicles and household appliances. In the early stages of development, before the controller is built, the control algorithms must be tested with the plant—the system to be controlled. To accomplish this, the RCP system behaves as the controller and uses specifically designed algorithms to test the control of the plant. After the preliminary version of the controller is built, it must be validated. For extensive testing, it is often more convenient to simulate the plant and test the controller. This is often referred to as hardware-in-the-loop (HIL) testing.

The LabVIEW FPGA Module extends the LabVIEW platform by building on the capabilities of LabVIEW and the LabVIEW Real-Time Module. Typically, for an HIL or RCP application, you use an RT target as your host computer. Here you will execute the main model and complex processing algorithms. You use the LabVIEW FPGA Module to configure the PXI-7381R to handle the I/O and synchronize with external events. Just as with a fixed-functionality I/O device, the hardware processing happens at a much higher speed than the software processing on the host computer. With the PXI-7381R, you can customize your own hardware processing, including simulating sensor outputs, generating and decoding PWM signals, and performing onboard decision making based on measured values. With this type of architecture, you can greatly reduce the need for multiprocessor systems that are often used to handle both the simulation and I/O in many systems today.

Digital Protocol Emulation
Many applications require that systems interface to devices that speak an uncommon digital protocol. Often, hardware for this is either not available or not affordable. With the LabVIEW FPGA Module, you can take advantage of the high-speed digital processing in hardware to decode and encode messages with a high degree of flexibility. In this way, you configure the PXI-7381R module to become an interface module for your communication protocol.

Flexible Encoder Interface
An encoder is a device for measuring speed or position. As a shaft rotates, pulses are generated indicating degrees of rotation. There are many different types of encoders available, and often several types must be used in the same application. With the LabVIEW FPGA Module, you can configure the PXI-7381R module to interface to different types of encoders on different digital lines and reconfigure the device for different applications. You can add your own custom functionality, such as reading the counters synchronously with other signals, rather than reading based on input signals to the counters themselves.

PWM Communication
Pulse-width modulated (PWM) signals are common in many industries, such as automotive and telecommunications. In a PWM pulse train, the frequency is held constant, and the information is conveyed by the duty cycle—the percentage of time the pulse is high. Many fixed-functionality DAQ devices do not adequately handle rapidly changing duty cycles or allocate a fixed number of channels for static PWM or other operations. With the LabVIEW FPGA Module, you can configure any of the digital lines on the PXI-7381R to read or write PWM signals as required by your application.

Discrete Control
Manufacturing applications require fast, robust control systems. By using the FPGA on an FPGA device to execute the logic of your application, the LabVIEW FPGA Module provides a platform for developing such systems. The PXI-7381R is able to scan and set multiple digital lines, while making control decisions in a fraction of a microsecond. Because the PXI-7381R running LabVIEW FPGA does not have the overhead of operating system software, such as a real-time operating system or a modification of the Windows kernel there is no possibility of unanticipated latency.

Custom Measurements
The LabVIEW FPGA Module brings a new level of timing control and synchronization capability to measurement and control system development. You now have the capability to design your own I/O board, simply by drawing a LabVIEW block diagram. As an example of this, consider a real-time measurement of spark timing of an automotive engine. This is the time delay from the engine’s crankshaft rotating through the zero degree mark, referred to as top dead center (TDC), and the firing of a particular spark plug. To make this measurement, you must measure the crankshaft position and the ignition coil voltage. The typical built-in automotive crank sensor is magnetic and counts the teeth in a gear on the crankshaft, sending out pulses that you can read on a digital input line. There are missing teeth at TDC. Thus to measure spark timing, you must determine, in real-time, when the signal from the crank sensor indicates the missing teeth. Now, also in real-time, you must measure the delay from this event on the digital input, and the analog event of spark firing. By implementing this logic with the LabVIEW FPGA Module, you create a custom I/O device. Whereas most I/O boards return a voltage or a pulse width to the host computer, this device returns spark timing calculated from mixed signal inputs.

Conculsion

By using the LabVIEW FPGA Module, your applications can benefit from the speed and synchronization capability of FPGAs, as well as traditional capabilities such as DAQ, image acquisition and processing, motion control, industrial communication, and others. Early users of the LabVIEW FPGA Module report that the dataflow model and inherent parallelism of the LabVIEW graphical programming language provides a highly intuitive environment for developing measurement and control applications for execution in hardware. Using LabVIEW FPGA with LabVIEW and LabVIEW Real-Time, you can address new applications and gain the most performance from your system.

For More Information
For more information on the LabVIEW FPGA and RIO hardware, contact Geoff Hoekstra at geoff.hoekstra@ni.com

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