Maximizing the Performance of the NI 6534 Digital I/O Device

The NI 6534 is a 32-bit, parallel, high-speed digital I/O device that uses the DAQ-DIO ASIC, a high-performance digital I/O interface designed by National Instruments. In addition to the DAQ-DIO, the NI 6534 also has large onboard memory buffers that allow pattern I/O operations to be carried out at high deterministic rates.

Differences Between NI 6533 and NI 6534 Devices

Differences Between NI 6533 and NI 6534 Devices
The NI 6534 offers performance advantages over the NI 6533 (also known as the DIO-32-HS) in certain operations, such as pattern I/O. Table 1 summarizes the differences between these two devices that contribute to the added performance of the NI 6534.

653X Device Concept: Groups

653X Device Concept: Groups
The 653X devices have two independent timing controllers for simultaneous high-speed dynamic data transfer, Group 1 and Group 2. Each group contains four control lines that can be used to control the input/output of data with hardware precision. Refer to Chapter 2, Using Your 653X, of the 653X User Manual for more information on groups.

Advantage of Onboard Memory

Advantage of Onboard Memory
The two sets of 32 MB onboard memory give the NI 6534 a significant performance advantage over the NI 6533. The high data transfer rates on the 6534 are sustainable primarily due to these large memory buffers present on the device.

Additionally, the large onboard memory allows certain processor-independent operations to be carried out with the 6534. For instance, data can be regenerated directly from the onboard memory (also referred to as onboard looping) on the 6534 without any interaction with the computer processor.

Data Transfer Modes

Data Transfer Modes
The NI 6534 supports several data transfer modes. Data transfer modes are specific methods for data exchange operations between a peripheral device and the 6534 device. The transfer modes that can be used by the NI 6534 are:

1. Unstrobed I/O (software timed)
2. Strobed, Dynamic, or Buffered I/O (hardware controlled)
3. Handshaking
4. Pattern I/O
5. Change Detection

Strobed or buffered operations use hardware signals to control data transfer, while unstrobed operations rely on execution of software commands. Consequently, data transfer rates in unstrobed operations are dependent on factors such as driver software, application development environment (such as LabVIEW, Visual Basic, or C++), processor speed, and the operating system. The choice of data transfer modes is generally not interchangeable for specific applications. Using the wrong mode for your application can result in unexpected behavior such as missing data. A detailed description of each transfer mode is given in the 653X User Manual along with instructions on how to choose the appropriate mode for various applications. This application note primarily covers performance maximization for pattern I/O and handshaking modes. Strobed operations are usually divided into two categories -- pattern I/O and handshaking. With pattern I/O, data is acquired or generated at a predetermined rate, and data transfer is controlled by either an internally generated or externally supplied clock. However, PCI-bus bandwidth limitations may prevent successful I/O at the clock rate. The theoretical PCI-bus maximum burst transfer rate is 132 Mbytes/sec, and typical sustained transfer rates on the PCI bus are up to 120 Mbytes/sec. The maximum achievable pattern I/O rate for the 653X is 80 Mbytes/sec, 2/3 of the sustainable transfer rate of the PCI bus. As other PCI devices are sharing the bus, the available bandwidth may not be enough to sustain the maximum transfer rate of the 653X. This is one of the primary reasons why onboard memory is so important. Onboard memory acts as a temporary storage space for data while waiting for the PCI bus, enabling the 6534 to achieve a higher sustainable transfer rate than the 6533. With handshaking, a specific protocol is used in acquiring or generating the data across the digital data lines of the 653X. Data is transferred upon the exchange of the handshaking signals between the peripheral device and the 6534, and either device may pause the transfer. As a result, we refer to the average transfer rate (total amount of data transferred over total amount of time) instead of sustained transfer rate when speaking of handshaking operations.

Strobed Input and Output

Strobed Input and Output
For pattern I/O, handshaking, and other strobed operations, a buffer is allocated in the RAM of the PC, so these operations are sometimes referred to as buffered operations. The buffer acts as a temporary container to store your incoming or outgoing data, allowing you to transfer large amounts of data without the limits imposed by the PCI bus. The following sections explain how buffer management is accomplished in the LabVIEW and NIDAQ C APIs to ensure that data is not erroneously regenerated or overwritten.

Buffered Input Operation
For buffered input operations, LabVIEW handles buffer management and allocates a buffer in the PC memory used to store data. Two marks, the end of data mark and the read mark, are used within a PC buffer to provide references to memory locations in RAM, as shown in Figure 1.


Data acquired by the 6534 moves the end of data mark towards the end of the buffer. The end of data mark points to the most recently acquired scan from the external device. The application software then copies the data from the PC buffer to an application buffer by calling DIO Read VI for data manipulation and streaming to file. The read mark points to the next scan that has not yet been copied by the application into the application buffer, therefore it marks the starting point of the next read scan.

While LabVIEW takes care of the buffer management and allocates the PC buffer for you, in the NIDAQ C API, you are responsible for providing the pointer of the buffer allocated for storing acquired data to the driver. Though the C API does not use the read and end of data marks, it manages the buffer in a similar manner, shown in Figure 2.


By calling DIG_Block_Check, the driver returns data remaining, the amount of buffer space remaining to be filled. By subtracting data remaining from the total size of the buffer, you get the location of the end of data. Once data remaining becomes zero or end of buffer is reached, you can retrieve the buffer contents.

Buffered Output Operations
As it does in input operations, LabVIEW uses two marks for buffer management: a write mark and an output mark. By calling DIO Write VI, the data is moved from an application buffer to the PC buffer. The write mark points to the location in the PC buffer to write the next set of application buffer data. The output mark points to the location of the last data point transferred from the PC buffer to the onboard FIFO of the 6534 or to the 6533. The use of the write and output marks is illustrated in Figure 3.


In NIDAQ C API, you are responsible for providing the driver the pointer to the beginning of the buffer that contains output data. DIG_Block_Out starts the output process. Again, though the C API does not use output and write marks, the buffer is still managed in a similar way. By calling DIG_Block_Check, the driver returns how many data locations remain in the buffer to be transferred out of the 653X devices. By subtracting data remaining from the total size of the buffer, you get the buffer location to write the next block of data to.

Choosing the Right Duration: Continuous vs. Finite I/O

Choosing the Right Duration: Continuous vs. Finite I/O
Depending on the application, you may either perform a finite or a continuous operation. The transfer rate in a digital I/O application can be improved by correctly choosing between these two types of operations. The following sections will discuss both operations in detail, as well as some commonly-received error messages.

Finite Operations
In a finite operation, a buffer is first allocated in computer memory (RAM). The NI 653X transfers a fixed amount of data to/from this buffer and then stops. Because the operation stops after a single buffer is acquired or generated, finite operation is also referred to as single-buffered operation. In finite operations, once the end of data mark (read operation) or the output mark (write operation) reaches the end of PC buffer, the data transfer stops. Because of its large onboard FIFO, the 6534 can achieve better performance in finite operations than the 6533. For this reason, you should consider finite operation when you know the total amount of data to transfer.

The maximum amount of finite data you can transfer depends on the available system memory, operating system, and application environment. If the total amount of data to be transferred is less than 32 MB, then it will fit on the onboard memory and the NI 6534 can provide a sustained data transfer rate of up to 20 MHz. If the total amount of data to be transferred is greater than 32 MB, then the sustained transfer rate depends on the available bandwidth on the PCI bus. In input operations, the 32 MB of onboard memory serves as a container to hold data waiting for the PCI bus to transfer to the allocated PC buffer. In pattern output operations, the PCI bus transfers data from a PC buffer to the onboard memory, and the 32 MB of onboard memory serves as a container to hold data for the 6534 to output.

Possible Errors in Finite Operations
In pattern input operations, NIDAQ reports a -10845 error if the PCI bus does not transfer data out of the onboard memory fast enough to sustain the predetermined input rate, resulting in an onboard memory overflow. In pattern output operations, NIDAQ reports a -10843 error if the PCI bus does not transfer data into the onboard memory fast enough to maintain the predetermined output rate, resulting in an onboard memory underflow.

Both errors, -10845 and -10843, are due to system limitations, primarily the available PCI bus bandwidth. The -10845 error is generated to prevent data over write, and the -10843 error message is generated to prevent data being regenerated. These errors are not generated in a handshaking operations, since the 6534 pauses the handshaking until the PCI bus is ready to resume data transfer. To prevent these error messages, try increasing PCI bus bandwidth by removing your network card, stopping other concurrent data acquisition operations, or decreasing bus usage by PCI graphic boards.

Continuous Operations
In continuous operations, data is transferred to or from the 653X device until the application or an error from NIDAQ stops the operation. An example of a continuous operation is continuously transferring 1000 8-bit samples for an indefinite period of time.

Continuous Input
Just as in finite operations, a PC buffer is allocated in the computer RAM as a temporary container for continuous input operations. Data from the 653X is streamed into this PC buffer via the PCI bus through either DMA or interrupt-driven transfer. At the same time, the application reads data from the PC buffer. The end of data mark moves towards the end of the buffer as the 653X acquires new data and the read mark follows as the application copies portions of data from the PC buffer to an application buffer. When the end of data mark reaches the end of the PC buffer, it wraps around to the beginning of the PC buffer, and the 653X begins to overwrite old data that has been copied by the application into the application buffer. This process continues until the application ends the transfer or an error occurs.

Possible Errors in Continuous Input Operations
In continuous pattern input, similar to the case of finite operation, NIDAQ may report a -10845 error. Again, this error will not occur in handshaking input operation, since the transfer is paused until the PCI bus is ready to resume again. Additionally, for continuous pattern input operations, your application may not be able to copy the data from the PC buffer to the application buffer fast enough, such that new data overwrites a portion of data in the PC buffer that had not been copied into the application buffer. In such a situation, NIDAQ will report a -10803, transferStoppedError.

Unlike error -10845, onboard FIFO overflow, which you may receive in the finite input case, the overwrite error, -10803 occurs at the PC memory side. The cause of this error message could be one or combination of following:

• The processor speed, try a faster computer which could increase the speed of transfer between your PC buffer and application buffer.
• The size of your PC buffer, try increase the size of your PC buffer, if the buffer is too small and the rate of data coming in is too fast, then you will receive the overwrite error
• The size of the application buffer. In LabVIEW, you could decide how much data to read back at one time, try adjusting that number for better performance. Generally, bigger is better.
• Efficiency of your program, try to free up some of your processor time in your program.

Continuous Output
For continuous pattern output, there are three different ways to generate data. To get the best output performance, it is important to choose the output method that is best for your application. The three continuous output methods and the characteristics of applications they are best suited for are summarized in Table 2.


Dynamically Generate New Output Data
If you need to continuously generate non-repeating data for an indefinite amount of time, then this method is probably your best choice. Each time a call to DIO Write VI (LabVIEW) or DIG_Block_Transfer (NIDAQ C) is executed, data from the application buffer is transferred into the PC buffer. The write mark moves to mark the beginning of the location in the PC buffer to write the next set of data from the application buffer; when it reaches the end of the buffer, the write mark wraps around to the beginning of the PC buffer. The data in the PC buffer is concurrently transferred to the 653X for output. The output mark moves to point to the location in the PC buffer for the next block of data to transfer to the 653X. If data from the application buffer is not moved to the PC buffer fast enough, leaving no new data in the PC buffer to send to the 653X -- the output marker overtakes the write maker -- NIDAQ reports a -10803, transferStoppedError.

Regenerate Data from PC Buffer
For applications where the PC buffer does not need to be constantly updated with new data from the application, consider the second type of continuous output operation, regeneration from PC buffer. In this type of continuous output operation, the data in the PC buffer which has already been generated by the application and sent to the 653X for output can be sent to the 653X again for regeneration. The regeneration output method is a good fit for applications where sometimes the buffer is repeated, but you need to be able to update the output data without stopping the output operation. To use this method, specify the data overwrite/regenerate parameter in the Digital Buffer Control VI (inside of DIO Start VI)(LabVIEW), or oldDataStop parameter in DIG_DB_Config (NIDAQ C). This is a good output method to use if a fixed set of data needs to be repeatedly generated for an indefinite period of time. Since the application is not required to constantly update the data in the PC buffer, this method saves processor time and also avoids the -10803, transferStoppedError.

In both of these output methods, the data from the PC buffer is transferred to the 653X through DMA or interrupts via the PCI bus. In pattern I/O, if the PCI bus is unable to keep up with the predetermined output rate for data generation, NIDAQ will report a -10843, Underflow error. This error will not occur for a handshaking operation since the 6534 will pause its data generation until the PCI bus can resume its transfer of data from the RAM. The device reads the data it needs to generate from PC memory, and thus utilizes the PCI bus.

Loop from Onboard Memory
Use the third method, looping from onboard memory, for applications where a fixed set of output data points must be infinitely repeated until stopped by a user. This option is only available for 6534 devices, which have an onboard buffer. The application first generates the data into a PC buffer, then transfers the data to the 6534 onboard memory over the PCI bus. Implement onboard looping by setting the Pattern Generation Loop Enable attribute to ON in DIO Parameter VI (LabVIEW), or by calling Set_DAQ_Device_Info (NIDAQ C) and setting ND_PATTERN_GENERATION_LOOP_ENABLED to ND_ON. This method avoids both underwrite and underflow errors, because the output data is downloaded to the 6534 only once, so PCI bus availability is not an issue during data output. Looping from onboard memory is the only continuous output method that can guarantee the maximum 20 MHz transfer rate of the 6534.

There are three important considerations when looping from onboard memory:

1. Data buffer size must be less than or equal to 32 MB, the size of each 6534 onboard buffer.
2. Buffer allocation must be in 32-bit increments. To generate 8-bit samples, the buffer size must be a multiple of 4; for 16-bit samples, buffer size must be a multiple of 2; buffers for 32-bit samples can be any size up to 32 MB.
3. To change the contents of the onboard buffer, you must first stop and reconfigure the 6534.

Possible Errors in Continuous Output Operations
When performing continuous pattern output from a PC buffer (continuously updated PC buffer or regeneration from PC buffer methods), the onboard FIFO under flow error, -10843, could occur, usually due to PCI-bus bandwidth limits. To avoid this error, see if you can increase PCI-bus bandwidth by removing your network card, or by stopping other concurrent data acquisition operations.

The transferStoppedError, -10803, may occur at the PC memory side if you are performing continuous buffered operation using the first output method. This error is due to one or a combination of limits. These limits, and possible solutions, are as follows:

• Processor speed -- If possible, use a faster computer, which may be able to transfer data between the PC buffer and the application buffer.
• Size of your PC buffer -- Increase the size of your PC buffer. If the buffer is too small to keep up with the data rate, you will receive an overwrite error.
• Size of the application buffer -- In LabVIEW, you can decide how much data to read back at one time. Changing the size of the application buffer may result in better performance. Generally, a larger buffer results in better performance.
• Efficiency of your program -- Optimize the use of processor time by your program.

Preloading for Output Operations
By default, the onboard memory on the NI 6534 is preloaded with data up to 32 MB per group for output operations. Preloading results in faster overall transfer rates and reduces the effects of PCI-bus bandwidth limitations. If the onboard memory is empty at the start of an output operation, there is a greater potential for underflow (-10843) errors.

Note: Preloading causes a small delay between the software call that starts a data output operation and the actual generation of the first data point by the 6534. You can turn off preloading to avoid this small delay. To disable preloading in LabVIEW, use DIO Parameter VI and set the Scarabs Preload Enable attribute to OFF. In NIDAQ C, use Set_DAQ_Device_Info and set the ND_FIFO_TRANSFER_COUNT to ND_NONE.

Multidevice and Multigroup Operations

Multidevice and Multigroup Operations
Because the NI 6534 devices for the PCI and PXI buses use the RTSI bus or the PXI trigger bus to share clock and trigger signals, you can use multiple 653X devices to create synchronized systems that can perform high-speed data transfer operations.

Note: It may not be possible to achieve a 20 MHz data transfer rate with a multidevice system using a single PCI bus, or for multigroup operations on the same 653X.

For multidevice operations, PCI-bus bandwidth becomes an even greater limitation to the maximum rate at which you can successfully transfer data. Multiple devices can collectively demand more bandwidth for data transfer than the PCI bus is capable of providing. The maximum clock rate for the 32-bit PCI bus is 33 MHz, for a maximum bandwidth of 132 MB/s, while the maximum bandwidth for each 6534 device is 80 MB/s. The bandwidth required to sustain the maximum data transfer rate for two 6534 devices on the same PCI bus is 160 MB/s, exceeding the total PCI bandwidth capability of 132 MB/s before the bandwidth demands of other devices on the same PCI bus are even considered.

When using multiple groups concurrently on the same 653X device, the DIO ASIC limits the maximum clock rate to 10 MHz if the total group size is greater than 16 bits.

Multiple 653X devices sharing the same PCI bus can maintain a 20 MHz I/O rate if each device is performing a single group operation and the total data transfer amount is less than 32 MB per device.

Benchmarking the 653X Devices

Benchmarking the 653X Devices
National Instruments has performed benchmark tests using 653X devices for both the PCI and PXI buses. These tests illustrate the differences between the 6533 and 6534, and support the performance-improvement recommendations made in this document.

To achieve the most consistent results possible, all of these tests were performed on two systems, one PCI-bus system and PXI system. The PCI benchmarks were performed on a Dell Optiplex GX 150 with a 1 GHz processor, 256 MB of RAM, Windows 2000, LabVIEW 6i, and NIDAQ 6.9.2. The PXI benchmarks were performed on a PXI 8170 controller with an 850 MHz processor, 256 MB of RAM, Windows 2000, LabVIEW 6i, and NIDAQ 6.9.2. Use these benchmark results to estimate the transfer rates you can expect for your application. Since most of these results are system dependent, they are not intended to be used as specifications.

Two main sets of tests were run on each system. One set measured the transfer rates of pattern I/O operations, while the other set measured burst mode transfers. Each set of tests were run with 8-bit, 16-bit, and 32-bit transfers (using port 0, ports 0-1, and ports 0-3, respectively, on the 653X devices).

Benchmark Tests Descriptions:
Pattern I/O -- For pattern I/O benchmark tests, the internal clock is used to control the transfer rate. If the selected transfer rate is too high, resulting in an error, the internal clock rate is decreased.

Finite Pattern I/O -- The finite pattern I/O test is repeated a number of times to ensure the maximum sustainable transfer rate.

Continuous Pattern Input -- The continuous input test executes until 1 GB of data is acquired. If an error occurs before 1 GB of data is acquired, the internal clock rate is decreased and the test restarts.

Continuous Pattern Output with Regeneration (6533 only) -- This test regenerates data from the PC buffer, so the application does not have to continuously update the data in the buffer. The test executes until 1 GB of data is generated. If an error occurs before all the data is generated, the internal clock rate is decreased and the test starts over.

Continuous Pattern Output with Loop from Onboard memory (6534 only) -- This test downloads a buffer of less than 32 MB from PC memory to the 6534 onboard memory, then continuously generates output data. Because the PCI bus is not required after the initial data transfer, the maximum transfer rate of the hardware, 20 MHz, is achievable.

Burst Mode Handshaking -- For burst mode I/O benchmark tests, the average transfer rate is calculated by dividing total data transferred by the total transfer time. Preloading to onboard memory is disabled for both finite and continuous burst I/O mode tests to achieve the highest average transfer rate.

Finite Burst Mode I/O -- The finite burst mode test is repeated a number of times to ensure the maximum average transfer rate.

Continuous Burst Mode I/O -- The continuous burst mode I/O test calculates the average transfer rate for a 1 GB data transfer.

Result Analysis
The results displayed in the attached Excel tables support the following conclusions:

• The NI 6534 is able to achieve faster rates in pattern I/O operations than the NI 6533 because of the onboard memory included on the 6534.
• The rates for the finite transfers are higher than the rates for continuous transfers.
• Output looping with the NI 6534 results in transfer rates up to 10 times as fast as regeneration for pattern output with the NI 6533. By generating the pattern from the onboard memory, a 6534 device can output the pattern at the maximum 20 MHz rate.

 

Termination

Termination
Because digital signals may reflect once they reach the end of the transmission line, producing false edges that can introduce errors, it is important to use an appropriate cable and appropriate termination, especially for high-speed transfers. Refer to Appendix D, Hardware Considerations, of the 653X User Manual for more details about recommended cabling and termination.

Summary

Summary
This application note has focused primarily on increasing the performance of an NI 6534 performing finite or continuous buffered operations. Buffered operation includes both handshaking and pattern I/O modes. In addition, this document has explained how buffer management is accomplished in both the LabVIEW and NI-DAQ C APIs to ensure that data is not erroneously regenerated or overwritten.

Performance-related errors and possible solutions for them have also been noted. A summary of performance-related errors is shown in Table 3.

General tips for improving overall performance of the NI 6534 include the following:

• If you know the amount of data to be transferred, and that amount does not exceed system memory limitations, finite I/O is generally faster than continuous I/O.
• Select the correct continuous output mode.
• Allow preloading for buffered pattern output operations

Reader Comments | Submit a comment »

Incomplete Documentation
Does not clearly define applicatoin of DPULL. Does not detail classic latch signal transfer. Does not give data format conversions needed by LabView to make use of data blocks.
- Gary England, PREMIER Sys Int. gary.england@premier-system.com - Jun 1, 2006