Reduce Errors Into Your High-Speed Data Acquisition Applications
Overview
To understand and overcome the pitfalls of acquiring a high-frequency signal with fast sampling rates, you need to understand the problems associated with high-speed computer-based data acquisition. These problems can lurk in the physical connections to the measurement hardware, the design of the measurement hardware itself, the architecture of the computer bus, and even the driver software. You do not have to be an expert programmer or an expert electrical engineer to overcome these problems. Use this article as a set of guidelines to ensure that you are preserving the integrity of your data as it passes out of the analog world and into the processing power of your computer. The first question you might have is, "When do I need to consider high-speed sampling rates?" There is no universal answer to this question, but generally any system sampling faster than 1 MS/s should be treated with special care.
Table of Contents
Analog Hardware Components
You can split the analog measurement world into two basic types of architectures -- simultaneous and multiplexing. In multiplexing architecture, you only need one analog-to-digital converter (ADC) and one amplifier to take multichannel measurements. Although the ADC can take only one measurement at a time, the multiplexer can switch between an arbitrary number of signal sources. Use the multiplexing architecture to measure signals only when a slow sampling rate is acceptable and when time relationships between signals are not critical.You do not need a multiplexer with simultaneous architecture because each channel has a dedicated ADC and a dedicated amplifier. Because these are expensive components, the simultaneous architecture is slightly more expensive. However, it is generally your better choice for higher frequency measurements. You benefit from simultaneous architecture because it takes advantage of the maximum sampling rate of the ADC for each channel. In a multiplexing architecture, however, the maximum sampling rate of the ADC is divided by the number of sampled channels. Simultaneous architectures also preserve the relative phase relationship of signals because multiple signal sources can be digitized at one time. You can not do this with a multiplexing architecture. The advantages of a high-speed DAQ system are not limited to the advantages of a simultaneous architecture. The analog circuitry is also considerably different.
The ADC itself is designed for a flat frequency response in the pass band, less overall signal distortion, and faster sampling rates. You achieve this faster design by trading physical space on the measurement hardware and power consumption. Generally, antialiasing filters accompany the ADC to improve the accuracy of the measurements. All measurement hardware has a natural bandwidth that attenuates signals above a certain frequency, but antialiasing filters are low-pass filters that provide a controlled and more reliable attenuation of undesired frequency components of a signal.
You can also improve the accuracy of your measurements by using high-speed measurement devices to sample at considerably higher rates than the Nyquist criterion. The Nyquist criterion states that you can exactly reproduce a signal if the sampling rate is twice as fast as the highest frequency component of the signal. This law does not take into account, however, the quantization error present in all digitizing hardware. You can reduce the signal-to-noise ratio (SNR) if you use high-speed digitizing hardware to sample many times faster than the highest frequency component of the signal. The necessary sampling speed for high frequency components requires that you pay careful attention when evaluating the digital components that control the analog circuitry and guide the data flow into computer memory.
Digital Hardware Components
The ADC needs a signal to know when to convert the analog signal into its digital representation. In high-speed measurement devices, the integrity and exact timing of the signal controlling the ADC is very important. The frequency of this timing signal has to be as fast as the sampling rate of the ADC. Consequently, if the sampling frequency is greater than 1 Msample/s, a relatively long signal path can distort and delay this control signal. This timing signal can originate from the internal oscillator, internal bus, or external source. The internal oscillator is the most reliable place because it offers the shortest path to the ADC, but sometimes you want to synchronize measurements from more than one hardware device. In this case, a multiple device bus is a good place to receive the timing signal. The bus can cause delay, but the delay is known and constant, and the bus is designed to carry high-frequency signals with very little distortion. A timing signal from an external source is more susceptible to delays and distortion because a small difference in wire type or wire length can change the delay to different measurement devices and cause a loss of synchronization. External signals are also more vulnerable to noise. The best way to synchronize measurements is to synchronize the internal oscillators. You can complete this with special phase-lock looping (PLL) circuitry. PLL circuitry monitors the phase relationship between multiple oscillators and keeps them at a constant relative phase.
Once the signals are properly synchronized, the data has to be passed from the measurement hardware into the computer memory. The measurement hardware is separated from the computer memory by a type of bus. The PCI/PXI bus is a very common and relatively fast bus. This bus can generally transfer 32 bits of data at 33 MHz for a total of 132 Mbytes/s. Because a 12 or 16-bit measurement requires two bytes of space, the maximum theoretical throughput for all analog channels across this bus is 66 Msamples/s. Figure 1 illustrates the different bus types and their respective transfer rates.
A deep onboard memory, often called an onboard FIFO, can overcome the speed limitation of a bus. If the onboard memory is large enough, all of your data can fit on this bus and you can transfer your measurements into the computer memory after the acquisition is complete. If the amount of data needed is larger than the onboard memory, the onboard memory still can serve as a holding place for data if the bus traffic from other devices is occasionally taking up bus bandwidth.
Choosing the Right Driver
All of the synchronization and data transfer control can be tedious without a well written driver to control all of these processes. A good driver must be both efficient and easy for a programmer to use. Although ease of use is important in all types of data acquisition, high-speed measurements require greater efficiency. A driver should be smart enough to handle the onboard memory, the bus type, and data transfer speed all without your intervention as a programmer. If, for instance, you exchanged a PCI-based device for a remote USB device, the driver should respond appropriately.
Putting It All Together
Although a majority of multichannel measurement hardware uses a multiplexing architecture, National Instruments offers many simultaneous architecture high-speed options. The NI 6110 and NI 6111 are PCI boards that offer up to four 5 Msample/s analog input channels and a RTSI bus connector for synchronization. The NI 6115 for PXI has four 10 Msample/s analog input channels with antialiasing filters, PLL, RTSI bus connectivity for synchronization, and a 16-million sample onboard FIFO. All three of these boards are multifunction boards that offer analog outputs, digital I/O, timing I/O, and analog input ranges as large as 42 V.
The high-speed digitizer product line features the NI 5102, NI 5112, and NI 5911. These boards can sample in real time at 100 Msamples/s or up to an effective 2.5 Gsamples/s (that’s 2,500,000,000 samples/s!) with patented RIS technology when sampling repetitive signals. All three of these boards have a significant amount of onboard memory, and the NI 5112 and NI 5911 can phase lock to other hardware or use the RTSI internal timing bus for synchronization.
The software is always a crucial piece of system design, and LabVIEW offers a graphical programming environment that works very well with the NI-DAQ and NI-SCOPE driver software to control this measurement hardware. This software is designed to be as efficient as possible while controlling low-level processes to avoid any unnecessary work from you.
See Also:
Download NI-DAQ Driver Software
Download NI-SCOPE Driver Software
Reader Comments | Submit a comment »
Legal
This tutorial (this "tutorial") was developed by National Instruments ("NI"). Although technical support of this tutorial may be made available by National Instruments, the content in this tutorial may not be completely tested and verified, and NI does not guarantee its quality in any way or that NI will continue to support this content with each new revision of related products and drivers. THIS TUTORIAL IS PROVIDED "AS IS" WITHOUT WARRANTY OF ANY KIND AND SUBJECT TO CERTAIN RESTRICTIONS AS MORE SPECIFICALLY SET FORTH IN NI.COM'S TERMS OF USE (http://ni.com/legal/termsofuse/unitedstates/us/).

