Think Synchronization First to Optimize Automated Test

Overview

Latencies and timing uncertainties involved in orchestrating the operation of multiple measurement components present a significant challenge in building automated test systems. These issues, often overlooked during the initial system design, limit the speed and accuracy of the system. However, with a good understanding of timing and synchronization technologies, you can address these issues from the onset and deploy a system optimized for throughput and performance.

Before we proceed, first consider that most automated measurements for test fall into one of two categories. The first category, often called time-domain measurements, characterizes the variation of a device under test (DUTs) output over time. For these measurements, the accuracy of the measured response depends not only on the accuracy of its magnitude, but also on the time at which the signals are measured.
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The second type or steady-state measurements occurs when one or more inputs of known value are applied to the DUT and its outputs can settle to their steady-state value before you measure the signals. In this case, the measurement process depends on the time of the measurement -- if you measure the signals too early, accuracy suffers because the source output may not have fully settled. Although you can measure the signals accurately any time after the output has settled, you must minimize the delay to reduce test time. Many test developers insert an arbitrary delay in their test programs to ensure accurate results. While this is a simple fix, test time suffers.

Analog electronic component evaluation and manufacturing test often involves measurements of both transient and steady-state parameters.

What Is Involved In Synchronization?

The main objective of synchronization of multiple measurement devices is correlated measurements and/or precise control of process execution. In most cases, you are interested in correlation in terms of time, but correlation can occasionally be in different terms, such as position. For temporal correlation, you must synchronize measurements to correlate with the sample clock of your measurement device. In other words, it is pointless to examine measurements synchronized to within nanoseconds if your sampling clocks are 1 MHz. The objective is a system with synchronized devices that are synchronized to sub-microsecond accuracy. Precise timing of measurements is a prerequisite of the measurement device.

Let us take a digitizer as an example to elaborate on key timing technologies. The heart of a digitizer is an ADC, which samples your signal and converts it to digital data. The sample clock, which controls the timing of the ADC, is most often derived from an onboard crystal oscillator. Thus, the synchronization of measurements across multiple devices, such as a source or other digitizers, implies that you must synchronize all sample clocks to within the uncertainty of the period of the sampling clocks.

Another important element to the measurement is collecting data. This is usually accomplished with trigger signals. External events or triggers are the main methodologies for initiating an acquisition. Triggers come in three forms -- analog, digital, and software. Analog triggering refers to trigger generation when a monitored analog signal passes the imposed triggering condition. You can measure the analog signal itself or an auxiliary analog signal. Digital triggering refers to trigger generation when a digital signal, such as a TTL level signal, is received. Software trigger refers to trigger generation on software command. The software trigger can be as simple as hitting a ‘start’ button on the soft front panel or graphical user interface (GUI). Thus, synchronization of measurements requires not only synchronized sample clocks, but also the distribution of a trigger to all measurement devices to initiate operation at the same time. In synchronization applications, it is common to designate a ‘master’ measurement device to monitor the operation of the entire measurement system. When the system meets triggering conditions on this device, it distributes a common trigger signal to all other devices that are ‘slaved’ to the master.

To achieve tight synchronization across multiple devices, you need to examine the distribution of clocks and triggers. There are three main schemes for synchronization:

1. Start/Stop Triggers Control Operation
On All Devices

This scheme for synchronization is the simplest. It involves a single start or stop trigger signal to all measurement devices involved. One device, designated as the ‘master’ device, monitors the operation. The master is set to look for an external trigger (analog or digital), or to generate a synchronizing trigger on a software command. When triggering conditions are met on the master device, or the software command is issued, the master distributes a trigger signal to all ‘slave’ devices to start operation as shown in Figure A.

Some examples are:

· Rotationally oriented measurements -- A master digitizer or oscilloscope, monitoring defects found on rotating circular or cylindrical devices such as computer hard drives, industrial cylindrical tubes, and automotive wheel shafts, passes a digital trigger to a slave counter/timer device making quadrature encoder measurements (position measurements). The system can correlate defects and anomalies to angular and radial position rather than time.

· High channel count measurements -- Multiple digitizers acquire data on reception of an external digital trigger from an external triggering module or a master digitizer in the system.

With the examples above, two issues arise:

The trigger signal should arrive at each slave device with minimal delay and skew between each other. The delay and skew are separate issues and need equal consideration. With a significant delay from the master to the slaves, you lose synchronization. Minimal path length for signal propagation from master to slaves is crucial for tight synchronization. The other important, but subtle, consideration is the skew between slave devices. So that each slave triggers at precisely the same time, you need to minimize the device-to-device skew in time. At the least, the delay and skew should be identified to some uncertainty. Measurements that require relatively low sampling rates can tolerate a degree of slack in the specifications of a system set up. At high sampling rates, these issues can affect the measurement integrity.



The second issue concerns the intrinsic accuracy of the measurement device -- you should identify or calibrate the time that the device received the trigger signal to the first pre-trigger or post-trigger sampled point in each device. You can program many measurement devices, such as digitizers, to continuously acquire samples into a circular onboard memory buffer that continually rewrites until it receives a trigger. After the device receives the trigger, the digitizer continues to acquire post-trigger samples if you specified a post-trigger sample count. The ability to correlate waveforms acquired on the various devices depends on the accuracy of the time-stamp of the trigger.

2. Triggers and a Direct Sample Clock
Initiate and Control the Timing on All Devices

This scheme takes synchronization a step higher. It involves trigger signals and a sample clock to all the devices involved. One device, designated as the ‘master’ device, controls the operation of the entire measurement system. This device exports its sample clock to all slave devices. For example, a system comprised of multiple digitizers and analog output sources has a common sample clock from an appointed ‘master.’ As illustrated in Figure B, the master sample clock directly controls ADC and digital to analog conversion (DAC) timing on all devices.

The master is set to look for an external trigger (analog or digital), or to generate the trigger on a software command. When triggering conditions are met on the master, the device distributes a trigger signal to all of the ‘slave’ devices to commence operation. The same issues that arose in the previous scenario are also present in this situation. The trigger and sample clock signals should arrive at each slave device with minimal delay and skew between each other. At the least the delay and skew should be known to an uncertainty. The significant advantage of this scheme compared with the previous scheme is that you use a common sample clock to control all devices. With a common sample clock, all waveforms are precisely sampled at the same time. This resolves the central issue of synchronized measurements.

With this technique, you benefit in another important way. If you employ the clock on each measurement device, you have to take the jitter and drift inherent in each clock into consideration. On each digitizer, different clock jitter and drift may give rise to sampling periods, which means you cannot correlate them with relative accuracy.

The disadvantage of this scheme is that it is not optimal for high-speed sampling because of the propagation delay of the sample clock. The sample clock simply takes time to get to the slaves from the master. This issue does not arise if the sampling rate is slower than the propagation delay. For example, in a given system the propagation delay is measured to be 10 ns. If the sampling rate is 5 MSamples/s, the period between each rising edge of the clock is 20 ns. The sample clock reaches the slave devices before the delay time encumbers the measurements. Additionally, the path lengths from the master to each slave device have to be carefully matched so the skew time is shorter than the sampling clock period.

3. Triggers and a Reference Clock to Initiate and Control
the Timing on All Devices

This scheme of synchronization is usually for high-speed synchronization. It involves start/stop trigger signals and a reference clock (typically 10 MHz) to all devices involved. The sampling clock of each measurement device is derived from the reference clock by dividing the reference clock to obtain higher speed sampling clocks. The master is set to look for an external trigger (analog or digital), or to start acquisition on a software command. When triggering conditions are met on the master, this device distributes a trigger signal to all slave devices to start operation.

With the previous scheme, you could have a direct feed of the sample clock to each device. This is the ideal scenario, however, it is not easy to pass a high-speed sampling clock (such as 100 MHz clocks) across cables and/or trigger buses because of line integrity and propagation delays. So, this scheme shares a common reference clock for generation of all sample clocks.

The method usually employed to synchronize and generate sampling clocks is phase lock looping (PLL). This method basically monitors the phase of the reference clock and produces a high-speed sampling clock that is phase locked to the reference clock, as shown in Figure C above.

Third-party frequency sources, such as rubidium and oven-controlled crystal oscillator (OCXO)-based frequency sources, are ideal for synchronization applications because of their accuracy. These are frequency sources with accuracies of better than 100 parts per billion (ppb). Thus, an OCXO source with 100 ppb accuracy yields a 10 MHz clock with 1 Hz uncertainty. Another important property of your reference clock is multiple output capability for multiple instrument synchronization. The reference clock from either the master instrument or a precision frequency source should be capable of being driven to multiple destinations without any loss of signal integrity. An example of this would be a minimal phase offset between the reference clock outputs from the frequency source.

The same issues that arose in the previous scenarios are also relevant in this scheme. The trigger and reference clock signals should arrive at each slave device with minimal delay and skew between each other. At the least, the delay and skew should be known to some uncertainty. The issue of minimal skew between each device is crucial for high-speed digitization. If the skew is large, the time stamp of the incoming trigger on each device will not be coincident in time, and you cannot accurately correlate events captured on separate devices.

Synchronization Options

Measurement devices come with three main options for connecting synchronization signals -- user-supplied cabling, proprietary vendor-defined cabling, and connections integrated with the measurement platform.

User-Supplied Cabling -- User-supplied cabling of signals for synchronization is available for both computer-based and stand-alone measurement devices. For example, you can often externally synchronize your function generator or digital storage oscilloscope (DSO) to a reference frequency source. When you decide to synchronize your instrumentation, you have to ensure that your cables from your frequency source to the other components of your measurement system are precisely matched in length in order to avoid skew. The same criteria need to apply in distribution of your trigger signal from master to all slave devices. As noted above, your frequency source should have the ability to distribute a common reference clock to multiple destinations. This is the only synchronization option for traditional stand-alone instruments.

Proprietary Vendor-Defined Cabling -- Some vendors of computer-based measurement devices, such as data acquisition boards, address synchronization by providing a proprietary bus, which may be external or internal to the computer. Sampling clocks, reference clocks, and triggers are distributed from master to slaves through the bus. These dedicated high-speed digital buses are designed to facilitate systems integration. The physical bus interface is a multipin connector on the board, and signals are shared via a ribbon. You can serially chain two, three, four, or five boards together, thus achieving synchronization of several I/O channels. Another attractive feature of these trigger buses is built-in switching, so you can route signals to and from the bus on-the-fly through software programming. This eases the burden of having to manually configure your timing and triggering signal distribution on your boards. You can find examples of these features in National Instruments measurement products in the form of the RTSI bus.

Connections Integrated with the Measurement Platform -- Some of the computer-based measurement devices are implemented in form factors such as VME/VXI and CompactPCI/PXI. VME/VXI, an older industrial form factor, and PXI/CompactPCI, a newer industrial form factor, both address test and measurement, telecommunications, defense, industrial research, and many other markets. VXI and PXI extended VME and CompactPCI by adding timing and triggering buses to the form factors. This greatly simplifies synchronization of multiple devices.

More on VXI and PXI

VXI and PXI are open standards and many companies make products for both variations. VXI is traditionally used in large test and measurement applications. Though relatively new to the market, PXI is gaining acceptance because of its relatively smaller footprint, portability, high throughput due to the PCI bus, and lower costs, made possible through use of standard commercial technologies spawned by the large PC Industry.

Electrically, VXI and PXI add a trigger bus, a star trigger bus, a 10 MHz reference clock, and local buses. For synchronized measurements, the trigger bus, the 10 MHz reference clock, and STAR trigger bus are key features. The PXI features described below broadly apply to VXI as well.

· System Reference Clock -- The PXI back-plane provides a built-in common reference clock for synchronization of multiple modules in a measurement or control system. Each peripheral slot features a 10 MHz TTL clock. Equal-length traces from the clock to each peripheral slot yield low skews of less than 1 ns between slots. The accuracy of the 10 MHz clock is usually 25 ppm (dependent on individual chassis vendors), making it a relatively reliable clock for synchronization applications that rely on PLL methods. If you need a more accurate reference clock, you can insert a PXI counter/timer device with an OCXO-based clock source into the second slot of the chassis. The slot’s OCXO 10 MHz clock can be driven onto the PXI backplane clock lines in lieu of the PXI backplane clock. Then, the whole PXI chassis can inherit the OCXO clock stability.

· Trigger Bus -- The PXI eight-line trigger bus provides intermodule synchronization and communication. Trigger or clock transmission can use the trigger bus lines. You can pass triggers from one module to any number of modules, so you can distribute digital trigger signals from master to slave measurement devices. With variable frequency sampling clock transmission, multiple modules can share a timebase that is not a derivative of the 10 MHz reference clock. For example, four data acquisition modules using a 44.1 kS/s CD audio sampling rate can share a clock that is a multiple of the 44.1 kHz or the direct 44.1 kS/s clock. For high-speed synchronization, the propagation delay and skew between slots can reach up to a maximum of 10 ns on a single PXI backplane.

· Star Trigger for Ultra High Speed Synchronization -- The Star trigger bus has an independent trigger line for each slot that is oriented in a star configuration from a special Star trigger slot (defined as slot 2 in any PXI chassis). The trigger can provide an independent dedicated line for each of up to 13 peripheral slots on a single PXI backplane. The PXI Star line lengths are matched in propagation delay to within one nanosecond from the Star trigger slot. This feature addresses ultra high-speed synchronization where you can distribute start/stop trigger signals from the master measurement module in the Star trigger slot with low delay and skew.

Platform	Trigger Bus	Reference Clock	Star Bus
VXI	8 TTL, 2 ECL	10 MHz ECL	Yes
PXI	8 TTL	10 MHz TTL	Yes

See Also:
PXI Alliance
NI and PXI

Conclusions

Computer-based measurement components are transforming creation of synchronized measurement systems from integration of loosely coupled, and often incompatible instruments, into an orderly engineering process that results in tightly integrated, high-performance systems. For synchronized measurements, timing and triggering details are critical keys to your automated measurements. Precise synchronization requires proper distribution of clocks and triggers. The three main synchronization schemes and proper knowledge of the pros and cons of each and the capabilities of your measurement devices help you to make the right decision in choosing your solution. For more information on synchronization, you can access the following application notes:

See Also:
Advanced Synchronization Techniques for Data Acquisition
Tips and Techniques in Data Acquisition Triggering
Synchronizing Motion, Vision, and Data Acquisition

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