Utilization of LabVIEW FPGA Structures/Functions/Data Types on an FPGA

This document presents a convenient look-up table that LabVIEW FPGA users can use to obtain a quantitative measure of the amount of FPGA fabric that the various elements in the block diagram such as functions/structures/data-types will take up

Introduction

National Instruments, with its introduction of its Reconfigurable I/O (RIO) systems has provided customers with a convenient, easy-to-use way of taking advantage of the customizability of FPGAs by using the LabVIEW FPGA Module. Oftentimes, a customer using the LabVIEW FPGA Module will question whether or not their design will fit onto the FPGA. This document is intended as a guide to help customers understand how the different functions, data types and structures can affect the utilization of the FPGA code.

Enclosed is a convenient look-up table that LabVIEW FPGA users can use to obtain a quantitative measure of how much of the FPGA fabric the elements in their block diagram, i.e., the functions, structures or data-types will take up.

General Trends & Tips

The following are general guidelines for data presented in the table:

1. The Benchmarks tabulated in this estimation document are valid when the logic utilization on the FPGA fabric is between 10 – 95%. Once the 95% limit is surpassed, Xilinx tools start optimizing and may result in being able to pack in more logic onto the fabric than the projected 5% limit. Hence, the figures tabulated in this document will not necessarily apply after passing the 95% mark

2. The Single Cycle Timed Loop (SCTL) is a structure specific to LabVIEW FPGA and has a significant impact on the utilization of various other structures and functions. This impact is so significant that the utilization of all other elements under this structure have been given a separate column. The SCTL will cause functions to use less FPGA slices when compared to using that same function inside a normal while loop. Oftentimes, the SCTL is an efficient way to minimize the footprint of your code where FPGA fabric is paramount. However, there are some caveats to using the SCTL that should be understood by any user.

3. Examining the utilization data brings about an interesting observation. The utilization of almost all LabVIEW functions on the FPGA is dependent on the data type that is wired into the function. Hence it is recommended to use the optimum data-type for an application to optimize FPGA slice usage (for example, if you will need only numbers between 1 and 10, a U8 would suffice rather than a U32 data type.)

4. Constants use less FPGA fabric than front panel controls. Users should only use front panel controls in their block diagram when needing to update these values from a host application.

Related Links:
Resource Utilization Statistics for FPGA VIs

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Table could be more useful
It would be helpful if there were units for the numbers given in the table. Also, it is not clear what "n/a" means.
- Dec 5, 2007