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IPNet - LabVIEW FPGA Functions and Example IP

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Overview

The LabVIEW FPGA IPNet is your one-stop resource for browsing, understanding, and downloading LabVIEW FPGA functions or IP (intellectual property). The table below is a collection of FPGA IP and examples gathered from the LabVIEW FPGA function palette, internal National Instruments developers, and the LabVIEW FPGA community. You should use this resource to acquire IP that you need for your application, download examples to help learn programming techniques, and explore the depth of IP offered by the LabVIEW FPGA platform. In addition to exploring what is offered here, you can also share your LabVIEW FPGA IP or submit an update to existing IP for the LabVIEW community by clicking the link below.



Note:
Code Maturity of 1 = unreleased or untested code. Minimum flexibility and/or usability.
Code Maturity of 5 = fully tested, shipping IP. Maximum flexibility and usability.

* indicates example or IP is coming soon.




Discuss and Request IP on the: IPNet Forum Thread

Style Guidelines for FPGA IP: LabVIEW FPGA Design for Code Modules (IP Cores)

General FPGA Users Manual: LabVIEW FPGA Manual

General LabVIEW FPGA Training: LabVIEW FPGA Training Material

 

Math

Name
LabVIEW Version
IP or Example
Source
Code Maturity

Multiply

8.5

IP

NI Labs

5

Divide

8.5

IP

NI Labs

5

Reciprocal

8.5

IP

NI Labs

5

Square Root

8.5

IP

NI Labs

5

Sine

8.5

IP

NI Labs

5

Cosine

8.5

IP

NI Labs

5

Arctangent2

8.5

IP

NI Labs

5

Polar To Rectangular

8.5

IP

NI Labs

5

Rectangular To Polar

8.5

IP

NI Labs

5

Hyperbolic Sine

8.5

IP

NI Labs

5

Hyperbolic Cosine

8.5

IP

NI Labs

5

Exponential

8.5

IP

NI Labs

5

Natural Logarithm

8.5

IP

NI Labs

5

FXP AddSub

8.5

IP

NI Labs

5

Integer Accumulator

8.5

IP

NI Labs

5

 Multiply Accum (Virtex5 DSP48E) 8.5 IP Developer Zone 4

Scale by Power of Two

8.5

IP

LabVIEW FPGA

5

Numeric Rounding

8.5

IP

LabVIEW FPGA

5

Pseudo-Random Number Gen

8.2

IP

Community

3

Linear Fit Regression (PtByPt)

8.5

IP

Community

3

Temperature Conversion

8.5

IP

Community

2

2n Point-by-Point Average

8.5

IP

Community

2

2n Point Moving Average

8.5

IP

Community

3

8-Point Average (Parallel)

8.5

IP

Community

2

Max/Min/Range (PtByPt)

8.5

IP

Community

2

Range (PtByPt)

8.5

IP

Community

4

Histogram (PtByPt)

8.5

IP

Community

3

 

Signal Processing

Name
LabVIEW Version
IP or Example
Source
Code Maturity

PID

8.0, 8.2, 8.5

IP

LabVIEW FPGA

5

Butterworth Filter

8.2, 8.5

IP

LabVIEW FPGA

5

DC and RMS Measurements

8.2, 8.5

IP

LabVIEW FPGA

5

Analog Period Measurement

8.2, 8.5

IP

LabVIEW FPGA

5

Notch Filter

8.5

IP

LabVIEW FPGA

5

Custom Digital Filters (IIR, FIR, ...)

8.0, 8.2, 8.5

IP

DFD Toolkit

5

Four Channel Gain/Attenuate

8.2

IP

Community

4

Simple Alarming

7.1

IP

Community

2

Fast Fourier Transform (FFT)

8.5

IP

Community

2

 Median Filter 8.5.1 IP Community 3

 

Data Manipulation, Transfer, and Storage

Name
LabVIEW Version
IP or Example
Source
Code Maturity

Direct Memory Access (DMA) FIFO

8.2, 8.5

IP

LabVIEW FPGA

5

 VI- or Target-Scope FIFO 8.2, 8.5 IP LabVIEW FPGA 5
 Memory Read/Write (FPGA Block RAM) 8.2, 8.5 IP LabVIEW FPGA 5
 Split/Join Number 8.0, 8.2, 8.5 IP LabVIEW FPGA 5
 Rotate Right/Left 8.0, 8.2, 8.5 IP LabVIEW FPGA 5
 Swap Bytes/Words 8.0, 8.2, 8.5 IP LabVIEW FPGA 5
 Numeric Conversion 8.0, 8.2, 8.5 IP LabVIEW FPGA 5
 Number To/From Boolean Array 8.0, 8.2, 8.5 IP LabVIEW FPGA 5

Simple Binary Shift Register

8.5

IP

Community

3

 Loop Benchmark Timer 8.5 IP Developer Zone 4
 Sort Array (Bubble Sort) 8.5 IP Community 3

 

RF and Communications

Name
LabVIEW Version
IP or Example
Source
Code Maturity
  FM Demodulation 8.5 IP Community 4

Amplitude Modulation (AM)

8.2, 8.5

IP

Community

3

  IQ Fractional Resampler (Upsampling) 8.5 IP Community 4
  IQ Fractional Resampler (Downsampling) 8.5 IP Community 4
  On-Off Keying Modulator 8.5 IP Community 4
  On-Off Keying Demod (Burst) 8.5 IP Community 4
  Diff. Binary Phase Shift Keying (DBPSK) Demod 8.5 IP Community 4
  Quadrature Phase-Shift Keying (QPSK) Demod 8.5 IP Community 4
  Reed-Solomon Encoder 8.5 IP Community 4
  Reed-Solomon Decoder 8.5 IP Community 4
  Viterbi Decoding 8.5 IP Community 4
 Lock-In Amplifier 8.5 IP Community 4

 

Data Acquisition

Name
LabVIEW Version
IP or Example
Source
Code Maturity

Balanced Analog I/O

8.2

Example

Developer Zone

4

160 Correlated DIO*

8.2

Example

Developer Zone

4

Multirate Analog Output

8.2

Example

Developer Zone

4

Buffered DAQ with DMA Streaming

8.2

Example

Developer Zone

4

Synchronous Loop Scheduler

8.5

Example

Community

3

Latching Digital Input

8.5

IP

Community

3

Digital Event Recorder

7.0

Example

Developer Zone

4

Edge Detection (Simple)

8.5

IP

Community

3

Edge detection (w/ decimation)

8.5

Example

Community

3

Level detection*

7.1

Example

Developer Zone

3

Custom Analog Triggering

7.1, 8.0

Example

Developer Zone

4

 Reference Triggering on FPGA 8.5 Example Developer Zone 3

Custom Digital Triggering

8.5

IP

Community

4

Hysteresis trigger

8.5

IP

Community

4

64-bit Counters

8.2

Example

Developer Zone

4

Tachometers

7.1

Example

Developer Zone

4

Pulse-Width Modulation (PWM)

8.2

Example

Developer Zone

4

Pulse Phase Shift (on-the-fly)

8.2.1

IP

Community

3

Tachometer Measure (w/hyst)

7.1

IP

Community

3

Quadrature Encoders

7.1

Example

Developer Zone

4

Related Links:

Advanced Data Acquisition Techniques with Intelligent DAQ

 

Signal Generation

Name
LabVIEW Version
IP or Example
Source
Code Maturity

Sine Wave Generation

8.0, 8.2, 8.5

IP

LabVIEW FPGA

5

Square Wave Generation

8.5

IP

LabVIEW FPGA

5

Ramp Function

7.1

IP

Community

2

Sawtooth Generator

8.5

IP

Community

3

Linear Waveforms

7.1

Example

Developer Zone

3

Nonlinear Waveforms

7.1

Example

Developer Zone

3

Periodic Waveforms

7.1

Example

Developer Zone

3

Arbitrary Waveform Generation

7.1

Example

Developer Zone

3

Uniform White Noise

8.5

IP

LabVIEW FPGA

5

Gaussian White Noise

8.5

IP

LabVIEW FPGA

5

VGA Signal Generation*

8.0

IP

Community

2

Audio Output Example*

8.0

Example

Community

2

Digital Pulse Generation

7.1

Example

Developer Zone

3

Pulse-Width Modulation (PWM)

8.2

Example

Developer Zone

4

 

Control

Name
LabVIEW Version
IP or Example
Source
Code Maturity

Discrete Linear Systems

Motion PID (Spline and Step)

8.0, 8.2, 8.5

IP

SoftMotion

5

 Spline Interpolation 8.0, 8.2, 8.5 IP SoftMotion 5

Discrete Control Filter

8.0, 8.2, 8.5

IP

LabVIEW FPGA

5

Discrete Delay

8.0, 8.2, 8.5

IP

LabVIEW FPGA

5

Discrete Normalized Integrator

8.0, 8.2, 8.5

IP

LabVIEW FPGA

5

Discrete PID

8.0, 8.2

IP

LabVIEW FPGA

5

Initial Condition

8.0, 8.2, 8.5

IP

LabVIEW FPGA

5

Unit Delay

8.0, 8.2, 8.5

IP

LabVIEW FPGA

5

Zero-Order Hold

8.0, 8.2, 8.5

IP

LabVIEW FPGA

5

Nonlinear Systems

Backlash

8.0, 8.2, 8.5

IP

LabVIEW FPGA

5

Boolean Crossing

8.0, 8.2, 8.5

IP

LabVIEW FPGA

5

Dead Zone

8.0, 8.2, 8.5

IP

LabVIEW FPGA

5

Friction

8.0, 8.2, 8.5

IP

LabVIEW FPGA

5

Memory Element

8.0, 8.2, 8.5

IP

LabVIEW FPGA

5

Quantizer

8.0, 8.2, 8.5

IP

LabVIEW FPGA

5

Rate Limiter

8.0, 8.2, 8.5

IP

LabVIEW FPGA

5

Relay

8.0, 8.2, 8.5

IP

LabVIEW FPGA

5

Saturation

8.0, 8.2, 8.5

IP

LabVIEW FPGA

5

Switch

8.0, 8.2, 8.5

IP

LabVIEW FPGA

5

Trigger

8.0, 8.2, 8.5

IP

LabVIEW FPGA

5

Zero Crossing

8.0, 8.2, 8.5

IP

LabVIEW FPGA

5

 

Digital Buses and Protocols

Name
LabVIEW Version
IP or Example
Source
Code Maturity

SPI

7.0

Example

Developer Zone

4

I2C

8.2

IP

Community

4

S/PDIF

7.1

Example

Developer Zone

4

RS-232

7.0, 8.2

Example

Developer Zone

2

HDLC

8.2

IP

Developer Zone

4

I2S

8.2

IP

Community

3

SSI

8.2

IP

Community

3

Huffman Decoder

8.2

IP

Community

3

IRIG-B

7.1

Example

Developer Zone

3

PCM Telemetry

7.1

Example

Developer Zone

3

UART

8.5

IP

Community

3

Clock Division

8.5

IP

Community

3

Custom Serial Protocol

8.0

Example

Developer Zone

3

 Num to 7-Segment LED 8.5 IP Community 3

Related Links:

Developing Digital Communication Interfaces

 

Sensor Simulation

Name
LabVIEW Version
IP or Example
Source
Code Maturity

LVDTs

7.1

Example

Developer Zone

3

Resolvers

7.1

Example

Developer Zone

3

Thermocouples

7.1

Example

Developer Zone

3

Quadrature Encoders

8.2

IP

Developer Zone

4

PWM

8.2

IP

Developer Zone

4

 

Encryption

Name
LabVIEW Version
IP or Example
Source
Code Maturity

Tiny Encryption Algorithm (TEA)

8.5

IP

Developer Zone

3

Extended Tiny Encryption (XTEA)

8.5

IP

Developer Zone

3

 

Other

Additional Functionality

Integrating existing VHDL code

Integrating third party IP cores

Using Look-up Tables

Division using data scaling

 

Submit Your LabVIEW FPGA IP or Example Program

You can share your LabVIEW FPGA IP or submit an update to existing IP for the entire LabVIEW FPGA community.

  1. Create an IP sub-VI to share with the community
  2. Please submit your IP by uploading onto NI Community
  3. Send an email to ipnet@ni.com with a link to your uploaded LabVIEW FPGA code

Related Links:

Browse LabVIEW FPGA Customer Case Studies

View LabVIEW FPGA Webcasts on Demand

R Series Intelligent DAQ

CompactRIO

National Instruments LabVIEW FPGA Module

 

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Legal
This tutorial (this "tutorial") was developed by National Instruments ("NI"). Although technical support of this tutorial may be made available by National Instruments, the content in this tutorial may not be completely tested and verified, and NI does not guarantee its quality in any way or that NI will continue to support this content with each new revision of related products and drivers. THIS TUTORIAL IS PROVIDED "AS IS" WITHOUT WARRANTY OF ANY KIND AND SUBJECT TO CERTAIN RESTRICTIONS AS MORE SPECIFICALLY SET FORTH IN NI.COM'S TERMS OF USE (http://ni.com/legal/termsofuse/unitedstates/us/).