TCP/IP between the Host PC and Real-Time Series Hardware
If the real-time application calls for high-speed transfer of data to the host PC, TCP/IP communication between the host PC and RT Series hardware should be performed in a separate non time-critical loop with the aid of a Real-Time (RT) FIFO or global variables. The RT Series hardware can run a time-critical loop that writes to a RT FIFO or global variable. Meanwhile, a parallel non time-critical loop in the same VI can read from the RT FIFO or global and then write this information through TCP/IP to the host PC. Conversely, the host PC could write to a non time-critical loop on RT Series hardware via TCP/IP. The non time-critical loop could then write this data to a RT FIFO or global, while the time-critical loop reads from the RT FIFO or global.

Related Links:
Real-Time FIFO Example
Real-Time FIFO for Deterministic Data Transfer Between VIs.
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