Which I/O Mode Should I Use?

When performing digital I/O, your choice of which I/O mode to use depends on your application. The options range from simple interrupt-driven I/O to complex buffered handshaking modes. Each I/O mode is described below to help you determine which is right for your application.

Static (Immediate) I/O
Basic digital I/O that employs no handshaking or hardware-controlled timing. Static I/O mode is interrupt driven, so it is relatively slow, allowing a maximum of about 10 kHz, depending on your computer.

Pattern I/O
Acquisition or generation of data at a predetermined frequency; no handshaking. Regulate the frequency by supplying a timing signal to the REQ line (external request); an NI 653x can generate its own REQ pulse (internal request), as well. Start and stop triggers can be used to start and stop an operation. This mode is available only on the DIO-32HS/653x and DIO-32F.

Handshaked I/O
DIO-32x Handshaking Modes
These modes are available only on the DIO-32HS and the DIO-32F, and include level-ACK, pulsed-ACK, and variable-width pulsed-ACK. These handshaking modes should be used when handshaking is required, but 8255 handshaking and burst mode are either not available (as on the DIO-32F), or are inappropriate for the device. Refer to your hardware user manual for more information (available at http://www.ni.com/support).

Burst Mode
This mode is available only on the DIO-32HS/653x. When both ACK and REQ are high, data is transferred on the rising edge of the PCLK (either internally or externally generated). If either are low, data is not transferred. While burst mode is the fastest transfer mode, it achieves these rates by essentially averaging its transfers. When the device can do so, it transfers data at a very high rate, but then may have to wait for the bus to become free again, resulting in a high average transfer rate, although the instantaneous transfer rate may not be high. Consequently, you should NOT use burst mode if data must be acquired at a constant rate; pattern I/O should be used instead.

NOTE: The PCLK signal is a running clock--data will be latched at each pulse, but not necessarily when the PCLK first begins. Also, by default, the PCLK direction is opposite the data direction: PCLK is received in data output mode and driven in data input mode. To reverse this, call the DIO Parameter VI with an attribute of "clock reverse mode" and a value of "on", or call Set_DAQ_Device_Info and infoType = ND_CLOCK_REVERSE_MODE_GRn and infoValue = ND_ON. (n is the group number).

8255 Handshaking
This is the native handshaking mode of the 8255 chip (used in Lab- and -1200 devices as well as the MIO-DE-10, PCI-6025E, DIO-24, and DIO-96). If you have an 8255-based device, this is one of the two handshaking modes available. The DIO-32HS/6533 emulates this mode.

Bidirectional Mode
This mode is only available on 8255-based devices. Based on the state of a handshaking line, the port will be either input or output.

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