Choosing Between FPGA-Enabled and Driver-Defined High-Speed Digital I/O Devices

With the growth in high-speed serial busses and the need for faster, real-time processing in digital test applications increasing, it is important for engineers to have an array of tools available to tackle high-speed digital applications. National Instruments now offers another option with NI FlexRIO, the high-performance, FPGA-based PXI devices programmable with NI LabVIEW FPGA. With NI FlexRIO, the I/O ability of the device is determined with the front-end adapter module, and many have speeds and performance comparable to existing NI high-speed digital devices (hundreds of megahertz). With these new options available, it is important for users to completely understand the different digital devices and to which applications they apply. This article highlights the advantages of choosing the different digital options available through NI.

Digital Devices

“FPGA enabled” and “driver-defined” are two broad categories that current digital devices can be broken into.  The reconfigurable, FPGA enabled digital devices are ideal for onboard processing; real-time control and hardware based decision-making capabilities.  These devices host an onboard FPGA that can perform user-programmed hardware operations.  Driver-defined digital devices have a factory-programmed-FPGA controlling the available processing on the module.  On these devices, the functionality is fixed to provide a simplified user experience for most common applications.

With the introduction of NI FlexRIO, the reconfigurable devices can achieve speeds similar to the driver-defined based devices found in NI’s existing high-speed digital I/O product line.  The new NI PXI-6581R digital instrument for example, features 54 digital channels with rates of up to 100 MHz and software selectable voltages of 1.8V, 2.5V, 3.3V, and 5.0V.  These specifications are comparable to existing NI 654x devices.

Figure 1 : The NI PXI-6581R is a FlexRIO based device capable of digital rates of 100 MHz with selectable voltages of 1.8V, 2.5V, 3.3V, and 5.0V.

Although both, FPGA-enabled devices and driver-defined high-speed digital devices target many similar applications, there are distinguishing factors in each.  These factors (discussed below) should help engineers decide which type of product is best suited for their application.

Why Driver-Defined High-Speed Digital I/O?

Immediate Ease-of-Use

Engineers can program driver-defined digital devices with the NI-HSDIO driver, available for a graphical programming language like LabVIEW or a text based environment like LabWindows/CVI or Visual Basic.  The NI-HSDIO driver has hardware-implemented advanced features built into it so that engineers do not have to program these FPGA based features themselves.  

Engineers can use built-in advanced features of the driver-defined high-speed devices for quick generation and acquisition of pre-defined waveforms.  Engineers can utilize advanced features such as hardware compare for testing integrated circuits (ICs) for common tests such as bit error rate testing (BERT).

Engineers can also use the built-in features for testing memory.  Electronics and computers have different kinds of internal and external memory such as Flash, RAM, and ROM.  Driver-defined digital devices simplify performing tests on memory by enabling engineers to use the NI-HSDIO driver.

Scripting, another useful feature, enables hardware decision making and analysis.  Engineers can use scripting to link and loop multiple waveforms together for generation using a text-based script.  A script is a series of instructions that indicates how waveforms saved in the onboard memory should be generated.  To read more about scripting see Advanced Features of High Speed Digital I/O devices : Scripting.

Furthermore, engineers can use the NI Digital Waveform Editor  for the easy creation of waveforms.  The NI Digital Waveform Editor is a graphical software tool engineers can use to visualize digital signals and easily create, edit, and modify digital waveforms for customized interfacing and test applications.

Figure 2: Tools such as the Script Editor and Digital Waveform Editor make creating and generating waveforms with the driver-defined devices easy.

Engineers can use a configurable environment such as NI LabVIEW SignalExpress to setup and use a driver-defined digital device.  With little or no programming, engineers can use LabVIEW SignalExpress to acquire and generate data, log data, perform analysis on acquired data, and generate reports.

Synchronization

For high-frequency mixed-signal test systems, tight synchronization is required between the different analog and digital devices.  Engineers can use either multiple digital devices synchronized together to create a higher channel count system or even different analog and digital devices to create a mixed-signal system.  To achieve such tight synchronization capabilities, the driver-defined high-speed digital instruments use the synchronization and memory core (SMC).  These SMC-based devices use the NI-TCLK driver, which allows users to synchronize multiple digital and analog devices for a complex mixed signal platform.  PXI chassis offer trigger and clock lines across the backplane for advanced synchronization capabilities.  Sub nano-second synchronization can be achieved using these SMC based devices.

Figure 3: PXI Timing and Triggering Buses – PXI combines industry-standard PC components, such as the PCI bus, ewith advanced triggering and synchronization extensions on the backplane.

Why FPGA-Enabled Digital Devices?

Custom Protocols and Hardware-Implemented Algorithms

The user-programmable FPGA available on the FlexRIO instruments provides an intuitive solution for applications requiring onboard processing, custom protocol emulation and testing, and hardware-implemented algorithms.  Engineers can use a FPGA-enabled instrument to implement multiple algorithms in a true parallel nature (in hardware) for complete real-time deterministic test and control applications.  With the choice of multiple adapter modules for the NI FlexRIO FPGA device, both analog and digital, engineers have the option of using one instrument with a small footprint for all their testing and control requirements. 

Engineers can use the NI FlexRIO to implement protocols such as SPI and I²C in hardware.  Using LabVIEW FPGA engineers can program their tester to behave either as a master or as a slave.  Engineers can also use this instrument to emulate and test custom protocols.

The FPGA provides a “hard” implementation of program execution.  In a non-FPGA environment, the driver layer controls hardware resources and the operating system processor bandwidth and memory.  For any given processor core, only one instruction can execute at a time, and processor-based systems are continually at risk of time-critical tasks pre-empting one another.  FPGAs, which do not use operating systems, minimize reliability concerns with true parallel execution and deterministic hardware dedicated to every task.

The driver-defined digital boards are also capable of onboard processing.  The hardware compare feature allows users to perform FPGA based comparisons, and generate clock cycle based hardware events.  Scripting allows onboard decision-making, linking and looping of waveforms and event generation.  Hardware compare and scripting is programmed with the NI HSDIO API.  These versatile features can provide users plenty of hardware timed processing capabilities.  No HDL or LabVIEW FPGA programming is required for implementing these features on a driver-defined digital device.  These features are “ready-made” and can be used immediately with little programming.  However, the driver is inbuilt with these features and cannot be customized.

Enhanced Control and Flexibility

With the option of customizing the FPGA on the NI FlexRIO, engineers have complete control over the algorithms that they want to implement on hardware.  Engineers can now implement things that were not easily implementable before.  They can achieve true hardware parallelism without having to rely on an intermediate software layer.  Engineers can implement applications requiring serial triggering, emulation of protocols or processor intensive analysis such as Fast Fourier Transforms, all in the FPGA.  Furthermore, they have increased digital bandwidth for I/O with the NI 6581 adapter module.

Engineers can use a FPGA enabled device for all the same features as the driver-defined digital devices.  However, it could take more time to develop these features (already developed for NI-HSDIO) in LabVIEW FPGA.  Consider scripting as an example: using the NI-HSDIO driver, engineers can utilize the Script Editor and example programs based in NI-HSDIO to generate and acquire complex waveforms with ease. 

Engineers can use NI LabVIEW FPGA for complete control over the communication, data transfer from PC memory to the FPGA or from the FPGA to the onboard DRAM.  Programmers might have to create a host VI and an FPGA VI for host-FPGA communication, use LabVIEW FPGA code to create the waveform and configure the I/O lines; and use socketed CLIP nodes to write the waveforms to the 128 MB onboard memory available on some of the FlexRIO modules.  This process could take more time than it would with the NI-HSDIO driver, but the advantage is flexibility. 

LabVIEW FPGA experience is required to program FPGA enabled instruments for input/output and DRAM access.  For further control of the instrument and adapter modules, users can make use of hardware description languages (HDL) such as VHDL for control over the onboard memory.  Users can think of the NI-HSDIO API as a “ready-made” solution, whereas with the FlexRIO instrument, users have more control over the fine points of hardware and memory but it requires some expertise.  It is also important to note that the LabVIEW FPGA module provides a graphical interface for programming FPGAs, which could save programmers a lot of time when compared to HDL.

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Figure 4: User CLIP nodes and Socketed CLIP nodes can be used to import existing VHDL code or customize reading/writing to DRAM or front panel I/O

Conclusion

With the success of FPGAs in different technologies and with the adoption of FPGA for digital instrumentation, it is important for users to correctly evaluate which product best suits their needs.  The hardware specifications of the existing driver-defined digital devices and those of the new FlexRIO instruments are similar; what differentiates them is the user experience and customizability.  The driver-defined high-speed digital devices are a ready-made solution and provide out-of-the-box functionality. 

	NI 6581	NI 6542
Driver	NI-RIO	NI-HSDIO
Open FPGA?	Yes, (Full Control, LV FPGA Target)	No
TCLK?	No	Yes
Number of DIO channels	54	32
External Reference Voltage	Yes	No
Double Data Rate(DDR)	Yes, Up to 200 Mbps on some voltage levels	No
Digital Waveform Editor	No	Yes
LV SignalExpress	No	Yes
Test Panels	No	Yes
Bidirectional Channels?	Yes	Yes
SMA PFI and Clock Lines?	No	Yes

Table 1 – As an example, the NI 6581 and NI 6542 have a lot in common when it comes to specifications, however the differences in usability makes them applicable to different digital solutions.

The FPGA-enabled instruments provide a re-configurable approach and complete control of algorithms, analysis, and protocols.  Corner cases, which might be difficult to implement with the driver-defined high-speed digital devices, can be architected with the FPGA enabled instruments.  The FPGA enabled devices do require knowledge of LabVIEW FPGA for fundamental programming.  For advanced control of memory or for use of existing code, HDL knowledge is required.  To conclude, prior experience of users coupled with their test application requirements will help them decide which product to use. 

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Figure 6: The fixed-functionality digital devices have some hardware processing available using SMC, whereas all the processing on a FPGA enabled instrument can be done in hardware.

Other Resources

View the specifications of the NI 6581

www.ni.com/flexrio

Introduction to the NI FlexRIO platform

Advanced Features of High-Speed Digital Devices

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