Interrupt Detection Background

NI-VISA 15.0 Help

Edition Date: June 2015

Part Number: 370131S-01

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Because PCI devices share one of four physical interrupt lines, it is possible that more than one PXI/PCI device can be interrupting at any given time. In the Interrupt Detection dialog, you specify the sequence of register operations that allow NI-VISA to determine whether or not your device is interrupting. PCI hardware typically indicates a pending interrupt condition using an Interrupt Status/Control register.

For the purposes of determining whether or not your device is asserting a hardware interrupt, a Read/Compare operation exists. This operation will perform a register read, applying a user-defined mask (logical-AND) to the contents of the register. The resulting value is then compared with a user-specified constant (using another logical-AND). If the masked-result and the user-defined constant are the same, the comparison operation is said to be True. If the values are different, the result is False. If the result of all Read/Compare operations in a sequence of register transactions is True, NI-VISA will conclude that your device is interrupting and proceed to execute the Interrupt Acknowledge sequence. Because NI-VISA relies on the result of the comparison operations in making this conclusion, at least one Read/Compare operation must be present in this transaction sequence.

When determining whether your device is asserting a hardware interrupt, you can use more than one transaction sequence. All comparisons within any given detection transaction sequence must have a result of True for that detection transaction sequence to have a result of True. If multiple detection transaction sequences are present, if any of them have a result of True, NI-VISA concludes that this interrupt belongs to this device.

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