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When the data rate multiplier is configured for DDR operation, the NI digital waveform generator/analyzer generates or acquires data twice per Sample clock period. The digital waveform generator/analyzer trades channel count for data rate by generating or acquiring on half the number of channels but at twice the rate. The phase relationship of the data to the Sample clock is determined by the data position. While you can configure the data rate multiplier for acquisition and generation separately, you cannot have both SDR channels and DDR channels in the same direction.
The following figure shows an example of DDR generation configured for rising edge data position.
|Notes DDR is currently available only on the NI 6547/6548 and NI 656x devices.|
|The NI 6547/6548 allows the user to determine whether acquisition or generation will use the upper or lower sixteen channels. The NI 6547/6548 also allows both acquisition and generation on the same set of channels at the same time.|
|Configuring the data rate multiplier for DDR operation impacts memory usage, data width, and other aspects of your application. Refer to the device documentation to determine if DDR mode meets your application needs.|