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Pipelining can be an effective way to increase the throughput of a sequential process in an RT application that runs on a system with multiple CPUs, also known as a multi-core, multi-processor, or SMP system. The most streamlined way to implement a pipeline is to use a While Loop and pass data through shift registers. However, if you want to use features such as priorities or manual CPU assignment, you need to use the Timed Loop. You cannot use shift registers in a Timed Loop to implement a pipeline because LabVIEW treats each Timed Loop as a single thread. To implement a pipeline with Timed Loops, you must place each pipeline stage in a parallel Timed Loop and pass data between the Timed Loops using a queue, a local variable, a global variable, or an RT FIFO. The following figure demonstrates the use of an RT FIFO to implement a pipeline.

The pipeline dataflow works differently depending on the method you use to transfer data. The method you choose should reflect whether the application requires each pipeline input to correspond one-to-one to a pipeline output. To ensure that pipeline inputs correspond one-to-one to pipeline outputs, you must use a method that waits for each data element. The example above creates an RT FIFO and uses the timeout input of the RT FIFO Read function to ensure that subVI B does not execute until the data from subVI A is available. If the application does not require pipeline inputs to correspond one-to-one to pipeline outputs, you can transfer data using a local or global variable or a single-element RT FIFO with a zero timeout. For more information about the advantages and disadvantages of various data transfer methods, refer to the topics in the Sharing Data in Deterministic Applications book.

When you use Timed Loops to implement a pipeline, the CPU scheduler performs automatic load balancing to distribute execution threads across multiple CPUs. You also can use the Assigned CPU input of the Timed Loop to manually assign each Timed Loop to a particular CPU.

Note  You can use the Real-Time Execution Trace Toolkit to help diagnose inefficient CPU utilization.

Note  Refer to the National Instruments Web site for more information about optimizing performance in a multiple-CPU RT system.

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