Owning Palette: SMP CPU Utilities VIs
Installed With: RT Module
Specifies the set of CPUs included in the System pool or the Timed Structures pool for automatic load balancing.
This VI is used as a building block for the higher-level SMP CPU Utilities VIs.

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pool specifies whether to set the System pool or the Timed Structures pool. | ||||||
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CPU mask specifies which CPUs to assign to the pool. This input is a bit mask in which the right-most bit corresponds to CPU 0 and the left-most bit corresponds to CPU 31, if such a CPU exists in the system. To include a CPU in the pool, set the value of the corresponding bit to one. | ||||||
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error in describes error conditions that occur before this VI or function runs.
The default is no error. If an error occurred before this VI or function runs, the VI or function passes the error in value to error out. This VI or function runs normally only if no error occurred before this VI or function runs. If an error occurs while this VI or function runs, it runs normally and sets its own error status in error out. Use the Simple Error Handler or General Error Handler VIs to display the description of the error code.
Use exception control to treat what is normally an error as no error or to treat a warning as an error.
Use error in and error out to check errors and to specify execution order by wiring error out from one node to error in of the next node.
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error out contains error information. If error in indicates that an error occurred before this VI or function ran, error out contains the same error information. Otherwise, it describes the error status that this VI or function produces.
Right-click the error out front panel indicator and select Explain Error from the shortcut menu for more information about the error.
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Refer to the Specifying the Set of CPUs Available for Automatic Load Balancing topic for more information about CPU pools.