Owning Palette: RT SMP CPU Utilities VIs
Requires: RT Module
Assigns CPUs to pools for automatic load balancing. This VI assigns CPUs to one of four possible states: System pool only, Timed Structures pool only, both pools, or no pool (reserved). This VI outputs the bit masks that specify the CPUs assigned to each pool.

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CPU pools specifies the pool assignments of each CPU in the system. This input is an array of enums. The enum contains the four possible states of a CPU and each element of the array represents a CPU. The array indices 0 - N correspond directly to the CPU indices 0 - N.
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error in (no error) describes error conditions that occur before this node runs. This input provides standard error in functionality. | ||||||||
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assigned CPU pools returns the CPU pool assignments.
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system mask returns a bit mask corresponding to System pool assignments. | ||||||||
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timed structures mask returns a bit mask corresponding to the Timed Structures pool assignments. | ||||||||
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error out contains error information. This output provides standard error out functionality. |
On an N-CPU system, the bits of the bit mask correspond to CPUs 0 through N-1. The right-most bit of each bit mask corresponds to CPU 0 and the left-most bit corresponds to CPU 31, if such a CPU exists in the system.
Refer to the Specifying the Set of CPUs Available for Automatic Load Balancing topic for more information about CPU pools.