Clock:PXI Chassis Clk 10 Source Property

NI RF Signal Generators Help (NI-RFSG 18.1)


Edition Date: June 2018
Part Number: 371025V-01
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Short Name: PXI Chassis Clk 10 Source

Property of niRFSG

Specifies the clock source for driving the PXI 10 MHz backplane Reference Clock. This property is configurable if the PXI-5610 upconverter module is installed in only Slot 2 of a PXI chassis. To set this property, the NI-RFSG device must be in the Configuration state.

Supported Devices: PXI-5610, PXI-5670/5671

Only certain combinations of this property and the Reference Clock Source property are valid, as shown in the following table.

PXI Chassis Clk 10 Source Property Setting Valid Reference Clock Source Property Setting
None, OnBoard Clock OnBoard Clock
None, RefIn RefIn
None (PXI 10 MHz oscillator), RefIn (Reference signal connected to the REF_IN connector of the upconverter; backplane locked to REF_IN; upconverter locked to backplane) PXI_CLK

Related Topics

Timing Configurations

System Reference Clock

Do not drive signal ()

Do not drive the PXI_CLK signal.

OnboardClock (OnboardClock)

Uses the highly stable oven-controlled onboard Reference Clock to drive the PXI_CLK signal.

RefIn (RefIn)

Uses the clock present at the front panel REF IN connector to drive the PXI_CLK signal.

Remarks

The following table lists the characteristics of this property.

Datatype string
PermissionsRead/Write
High-level VIs niRFSG Configure PXI Chassis Clk10
Channel-based No
ResettableYes

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