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LabVIEW 8.2 Help
August 2006

NI Part Number:
371361B-01

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Inherits from I/O Session class.

Long Name Description
VME/VXI Settings:Source Byte Order This property specifies the byte order to be used in high-level access operations, such as VISA In X and VISA Move In X, when reading from the source. Details
PXI/PCI Settings:PCI Resources:BAR5 Address Type This property specifies what type of address requirements (memory or I/O) the device has for this Base Address Register. If the device does not request addresses in this space, the value will be VI_PXI_ADDR_NONE(0). Details
Serial Settings:Parity This property specifies the parity used with every frame that is transmitted or received. Valid values are: (0) Parity None, (1) Parity Odd, (2) Parity Even, (3) Parity Mark, (4) Parity Space. Details
Serial Settings:Number of Bytes at Serial Port This property specifies the number of bytes currently available at the serial port used by this session. Details
VME/VXI Settings:VXI Commander Logical Address This property value is the logical address of the commander of the VXI device. Details
VME/VXI Settings:VXI Memory Base Address This property value is the base address of the device in VXI memory space. Details
GPIB Settings:Unaddressing This property specifies whether to unaddress the device (UNT and UNL) after each read or write operation. Details
PXI/PCI Settings:PCI Resources:BAR0 Address Type This property specifies what type of address requirements (memory or I/O) the device has for this Base Address Register. If the device does not request addresses in this space, the value will be VI_PXI_ADDR_NONE(0). Details
Serial Settings:Data Bits This property specifies the number of data bits contained in each frame. Valid values are 5-8. Details
PXI/PCI Settings:PXI Chassis Number This property specifies the PXI chassis number of this device. Details
PXI/PCI Settings:Maximum Link Width This property specifies the maximum PCI Express link width of the device. A value of -1 indicates that the device is not a PXI/PCI Express device. Details
Serial Settings:Modem Line Settings:Break State This property lets you manually control the serial port's break state. If asserted, it suspends character transmission and places the transmission line in a break state until this property is unasserted. If you want VISA to send a break signal after each write operation automatically, use the Break Len and ASRL End Out properties instead. Details
PXI/PCI Settings:PCI Resources:BAR3 Address Base This property specifies the system-assigned base this device uses in the given space. If the device does not request addresses in this space, the value of this property is meaningless. Details
GPIB Settings:Readdressing This property specifies whether the device is to be readdressed before every transfer. Details
TCP/IP Settings:Computer Hostname This specifies the host name of the device. If no host name is available, this property returns an empty string. Details
PXI/PCI Settings:Actual Link Width This property specifies the PCI Express link width negotiated between the PCI Express host controller and the device. A value of -1 indicates that the device is not a PXI/PCI Express device. Details
PXI/PCI Settings:PCI Device Number This property specifies the PCI device number of the PXI/PCI resource. Details
Serial Settings:Modem Line Settings:Line DTR State This property is used to manually assert or unassert the Data Terminal Ready (DTR) output signal. Details
Message Based Settings:Is 488.2 Compliant This property specifies whether the device is 488.2 compliant. Details
VME/VXI Settings:Immediate Servant This property value reflects whether the VXI device is an immediate servant of the local controller. Details
Serial Settings:Baud Rate This property specifies the baud rate of the given communications port. Details
PXI/PCI Settings:PCI Resources:BAR4 Address Type This property specifies what type of address requirements (memory or I/O) the device has for this Base Address Register. If the device does not request addresses in this space, the value will be VI_PXI_ADDR_NONE(0). Details
PXI/PCI Settings:PCI Resources:BAR4 Address Base This property specifies the system-assigned base this device uses in the given space. If the device does not request addresses in this space, the value of this property is meaningless. Details
PXI/PCI Settings:PCI Resources:BAR2 Address Base This property specifies the system-assigned base this device uses in the given space. If the device does not request addresses in this space, the value of this property is meaningless. Details
PXI/PCI Settings:PCI Resources:BAR3 Address Type This property specifies what type of address requirements (memory or I/O) the device has for this Base Address Register. If the device does not request addresses in this space, the value will be VI_PXI_ADDR_NONE(0). Details
PXI/PCI Settings:Star Trigger Line This property specifies the PXI_STAR line connected to this device. Details
Serial Settings:Flow Control XOFF Character This property specifies the value of the XOFF character used for XON/XOFF flow control (both directions). If XON/XOFF flow control (software handshaking) is not being used, the value of this property is ignored. Details
PXI/PCI Settings:Slot Path This property specifies the slot path of this device. Details
PXI/PCI Settings:Slot Local Bus Right This property specifies the slot number or special feature connected to the local bus right lines of this device. Details
TCP/IP Settings:Dot-Notation Address This is the TCPIP address of the device to which the session is connected. This string is formatted in dot notation. Details
VME/VXI Settings:Destination Access Privilege This property specifies the address modifier to be used in high-level access operations, such as VISA Out X and VISA Move Out X, when writing to the destination. Details
PXI/PCI Settings:D-Star Set This property specifies the set of differential star lines connected to this device. A value of -1 means that the chassis is unidentified or does not have a timing slot. Details
PXI/PCI Settings:D-Star Bus Number This property specifies the differential star bus number of this device. A value of -1 means that the chassis is unidentified or does not have a timing slot. Details
PXI/PCI Settings:PCI Resources:BAR5 Address Base This property specifies the system-assigned base this device uses in the given space. If the device does not request addresses in this space, the value of this property is meaningless. Details
FireWire Settings:Upper Chip ID This property specifies the upper chip ID for a FireWireŽ device. Details
Message Based Settings:Suppress End Enable This property is relevant only in VISA Read and related operations. Details
Register Based Settings:Window Access This property value reflects whether the current session has a mapped window, and if so, whether accesses through this window can be achieved through direct pointer dereferences. Details
Serial Settings:End Mode for Reads This property specifies the method used to terminate read operations. Valid values are: (0) End None, (1) End Last Bit, (2) End TermChar. If the value is (2) End TermChar, then the value of the property TermChar En is ignored. Details
VME/VXI Settings:VXI Memory Size This property value is the size of memory requested by the device in VXI memory space. Details
Serial Settings:Flow Control XON Character This property specifies the value of the XON character used for XON/XOFF flow control (both directions). If XON/XOFF flow control (software handshaking) is not being used, the value of this property is ignored. Details
FireWire Settings:Destination Upper Offset This property specifies the upper 16 bits of the 48-bit destination address for a FireWireŽ device. Details
VME/VXI Settings:VXI Logical Address This property value is the logical address of the VXI device. Details
PXI/PCI Settings:PCI Resources:BAR4 Address Size This property specifies the requested address size of this device in the given space. If the device does not request addresses in this space, the value is meaningless. If this value cannot be safely determined, the value will be 0xFFFFFFFF. Details
Serial Settings:Modem Line Settings:Line RI State This property represents the current state of the Ring Indicator (RI) input signal. The RI signal is often used by modems to indicate that the telephone line is ringing. This property is Read Only except when the Wire Mode property is set to RS232/DCE, or RS232/AUTO with the hardware currently in the DCE state. Details
General Settings:Manufacturer Identification This property value corresponds to the ID of the manufacturer that created the device. Details
Message Based Settings:Termination Character Enable This property specifies whether a read operation should terminate when the termination character is received. Details
Message Based Settings:Termination Character This property specifies a character that, when read, causes a read operation to terminate. The termination character must also be enabled. Details
TCP/IP Settings:LAN Device Name This specifies the LAN device name used by the VXI-11 protocol (for example, inst0) during connection. Details
PXI/PCI Settings:PCI Resources:BAR5 Address Size This property specifies the requested address size of this device in the given space. If the device does not request addresses in this space, the value is meaningless. If this value cannot be safely determined, the value will be 0xFFFFFFFF. Details
USB Settings:USB Interface Number This property specifies the USB interface number used by the given session. Details
PXI/PCI Settings:PCI Resources:BAR1 Address Size This property specifies the requested address size of this device in the given space. If the device does not request addresses in this space, the value is meaningless. If this value cannot be safely determined, the value will be 0xFFFFFFFF. Details
Serial Settings:Modem Line Settings:Line CTS State This property shows the current state of the Clear To Send (CTS) input signal. Details
Message Based Settings:Send End Enable This property specifies whether to send an END indicator on the last byte of each write operation. This property is relevant only in VISA Write and related operations. Details
VME/VXI Settings:VXI Memory Address Space This property value is the VXI address space used by the device. Details
VME/VXI Settings:Window Byte Order This property specifies the byte order to be used in low-level access operations, such as VISA Map Address, VISA Peek X and VISA Poke X, when accessing the mapped window. Details
USB Settings:USB Protocol This property specifies the USB protocol used by the given session. Details
PXI/PCI Settings:Slot Local Bus Left This property specifies the slot number or special feature connected to the local bus left lines of this device. Details
General Settings:Slot This property value is the physical slot location of the device. If the slot is unknown, the value returned will be -1. Details
PXI/PCI Settings:PCI Resources:BAR2 Address Size This property specifies the requested address size of this device in the given space. If the device does not request addresses in this space, the value is meaningless. If this value cannot be safely determined, the value will be 0xFFFFFFFF. Details
GPIB Settings:Secondary Address This property value is the secondary address of the GPIB device used by the given session. If the device does not have a secondary address, then the value of this property is 65535 (0xFFFF). Details
VME/VXI Settings:Window Access Privilege This property specifies the address modifier to be used in low-level access operations, such as VISA Map Address, VISA Peek X and VISA Poke X, when accessing the mapped window. Details
VME/VXI Settings:Mainframe Logical Address This property value is the lowest logical address in the mainframe in which the device resides. Details
USB Settings:Serial Number This property specifies the USB serial number of this device. Details
Serial Settings:Error Replacement Character This property specifies the character to be used to replace incoming characters that arrive with errors (such as a parity error). Details
General Settings:Model Name This string property is the model name of the device. Details
Serial Settings:Stop Bits This property specifies the number of stop bits used to indicate the end of a frame. Valid values are: (10) Stop One, (15) Stop One-and-a-Half, (20) Stop Two. Details
Serial Settings:Discard NUL Characters This property specifies whether to discard each data byte whose value is 0. If enabled, NUL characters are discarded. Otherwise, they are treated as normal data characters. For binary transfers, disable this property. Details
FireWire Settings:Vendor ID This property specifies the vendor ID for a FireWireŽ device. Details
FireWire Settings:Lower Chip ID This property specifies the lower chip ID for a FireWireŽ device. Details
TCP/IP Settings:No Packet Delay The Nagle algorithm is disabled when this property is enabled (and vice versa). The Nagle algorithm improves network performance by buffering written data until a full-size packet can be sent. This property is enabled by default in VISA to verify that writes get flushed immediately. Details
Register Based Settings:Window Base Address This property value is the base interface address to which this window is mapped. Details
Message Based Settings:File Append Enable This property specifies whether VISA Read To File will overwrite (truncate) or append when opening a file. Details
Serial Settings:End Mode for Writes This property specifies the method used to terminate write operations. Valid values are: (0) End None, (1) End Last Bit, (2) End Add TermChar, (3) End Break. Details
General Settings:Allow DMA Transfers This property specifies whether I/O accesses should attempt to use DMA (T) or Programmed I/O (F). In some implementations, this property may have global effects even though it is documented to be a local property. Details
Serial Settings:Is Port Connected This property specifies whether the port is properly connected to another port or device. This property is valid only with serial drivers developed by National Instruments and documented to support this feature with the corresponding National Instruments hardware. Details
Serial Settings:Allow Transmit If disabled (F), the serial port suspends transmission as if an XOFF character has been received. If enabled (T), it resumes transmission as if an XON character has been received. If XON/XOFF flow control (software handshaking) is not being used, it is invalid to disable this property. Details
General Settings:Trigger Identifier This property specifies which trigger mechanism to use. In VXI systems, for example, you can choose between software triggers and hardware triggers on a specific trigger line. Details
Register Based Settings:Destination Increment Count This property specifies the number of elements by which to increment the destination address on block move operations. Valid values are 0 and 1. Details
PXI/PCI Settings:Is PCI Express This property specifies whether the device is PXI/PCI or PXI/PCI Express. Details
Serial Settings:Break Length This property controls the duration (in milliseconds) of the break signal asserted when ASRL End Out is set to Break (3). Valid values are 1-500. Details
VME/VXI Settings:Fast Data Channel:Use Channel Pairs This property specifies whether transfers will use a pair of FDC channels. If not set, only one FDC channel will be used. Details
PXI/PCI Settings:PCI Resources:BAR0 Address Size This property specifies the requested address size of this device in the given space. If the device does not request addresses in this space, the value is meaningless. If this value cannot be safely determined, the value will be 0xFFFFFFFF. Details
PXI/PCI Settings:PCI Resources:BAR3 Address Size This property specifies the requested address size of this device in the given space. If the device does not request addresses in this space, the value is meaningless. If this value cannot be safely determined, the value will be 0xFFFFFFFF. Details
PXI/PCI Settings:Slot Link Width This property specifies the PCI Express link width of the PXI Express peripheral slot in which the device resides. A value of -1 indicates that the device is not a PXI Express device. Details
PXI/PCI Settings:PCI Resources:BAR0 Address Base This property specifies the system-assigned base this device uses in the given space. If the device does not request addresses in this space, the value of this property is meaningless. Details
VME/VXI Settings:Source Access Privilege This property specifies the address modifier to be used in high-level access operations, such as VISA In X and VISA Move In X, when reading from the source. Details
Register Based Settings:Window Size This property value is the size of the region mapped to this window. Details
GPIB Settings:Line REN State This property returns the current state of the GPIB REN interface line. Details
PXI/PCI Settings:PCI Bus Number This property specifies the PCI bus number of the PXI/PCI resource. Details
Interface Information:Interface Number of Parent This property value specifies the board number of the parent device. Details
VME/VXI Settings:Fast Data Channel:Channel Mode This property specifies whether FDC transfers will use normal or streaming mode. Details
Serial Settings:Modem Line Settings:Line DCD State This property represents the current state of the Data Carrier Detect (DCD) input signal. This is often used by modems to indicate the detection of a carrier (modem) on the phone line. This is also known as Receive Line Signal Detect (RLSD). This property is Read Only except when the Wire Mode property is set to RS232/DCE, or RS232/AUTO with the hardware currently in the DCE state. Details
TCP/IP Settings:Keep-Alive Packets Setting this property to TRUE requests that a TCP/IP provider enable the use of keep-alive packets on TCP connections. After the system detects that a connection was dropped, VISA will return a lost connection error code on subsequent I/O calls on the session. The time required for the system to detect that the connection was dropped is dependent on the system and is not settable. Details
Serial Settings:Wire Mode This property represents the current wire/transceiver mode. For RS-485 hardware, this property is valid only with the RS-485 serial driver developed by National Instruments. For RS-232 hardware, the values RS232/DCE and RS232/AUTO are valid only with RS-232 serial drivers developed by National Instruments and documented to support this feature with the corresponding National Instruments hardware. When this feature is not supported, RS232/DTE is the only valid value. Details
USB Settings:Maximum Interrupt Size This property specifies the maximum size of data that will be stored by any given USB interrupt. If a USB interrupt contains more data than this size, the data in excess of this size will be lost. Details
Register Based Settings:Source Increment Count This property specifies the number of elements by which to increment the source address on block move operations. Valid values are 0 and 1. Details
General Settings:Model Code This property value is the device model code assigned by the manufacturer. Details
PXI/PCI Settings:Trigger Bus Number This property specifies the trigger bus number of this device. Details
VME/VXI Settings:VXI Device Class This specifies which class the VXI or VME device is a member of. Details
Serial Settings:Flow Control This property specifies the flow control method used for both transmitting and receiving data. Valid values are: (0) Flow None, (1) Flow XON/XOFF, (2) Flow RTS/CTS, (3) Flow XON/XOFF and RTS/CTS, (4) Flow DTR/DSR, (5) Flow XON/XOFF and DTR/DSR. Certain values or combinations of values may not be supported by all serial ports and/or operating systems. Details
GPIB Settings:Primary Address This property value is the primary address of the GPIB device used by the given session. Details
VME/VXI Settings:Destination Byte Order This property specifies the byte order to be used in high-level access operations, such as VISA Out X and VISA Move Out X, when writing to the destination. Details
VME/VXI Settings:Supported VXI Trigger Lines This property shows which VXI trigger lines this implementation supports. This is a bit vector with bits 0-9 corresponding to TTL0 through ECL1. Details
Serial Settings:Modem Line Settings:Line DSR State This property shows the current state of the Data Set Ready (DSR) input signal. Details
PXI/PCI Settings:PCI Resources:BAR1 Address Type This property specifies what type of address requirements (memory or I/O) the device has for this Base Address Register. If the device does not request addresses in this space, the value will be VI_PXI_ADDR_NONE(0). Details
PXI/PCI Settings:PCI Function Number This property specifies the PCI function number of the PXI/PCI resource. For most devices this will be 0, but a multifunction device may have a function number up to 7. The meaning of a function number other than 0 is device-specific. Details
Message Based Settings:IO Protocol This property specifies which protocol to use. In VXI, you can choose normal word serial or fast data channel. In GPIB, you can choose normal or high-speed HS-488 transfers. In serial, TCPIP, or USB, you can choose normal transfers or 488.2-defined strings. In USBTMC, you can choose normal or vendor-specific transfers. Details
General Settings:Manufacturer Name This string property is the manufacturer's name. Details
PXI/PCI Settings:PCI Resources:BAR2 Address Type This property specifies what type of address requirements (memory or I/O) the device has for this Base Address Register. If the device does not request addresses in this space, the value will be VI_PXI_ADDR_NONE(0). Details
FireWire Settings:Source Upper Offset This property specifies the upper 16 bits of the 48-bit source address for a FireWireŽ device. Details
VME/VXI Settings:Fast Data Channel:Channel Number This property specifies which FDC channel will be used to transfer data buffers. Valid values are 0-7. Details
Serial Settings:Modem Line Settings:Line RTS State This property is used to manually assert or unassert the Request To Send (RTS) output signal. When the flow control is set to hardware handshaking, it is invalid to change this property. Details
PXI/PCI Settings:PCI Resources:BAR1 Address Base This property specifies the system-assigned base this device uses in the given space. If the device does not request addresses in this space, the value of this property is meaningless. Details
FireWire Settings:Window Upper Offset This property specifies the upper 16 bits of the 48-bit address for a FireWireŽ device when a window is mapped. Details
PXI/PCI Settings:Star Trigger Bus Number This property specifies the star trigger bus number of this device. Details

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