Owning Palette: Timed Structures and VIs
Requires: Base Package (ETS, Windows)
All timed structures in a synchronization group wait until all the structures are ready to execute.
|clear, if TRUE, removes all timed structures from synchronization group name before adding the timed structures in timed structure names to the group. Set clear to TRUE to remove any timed structures that do not correspond to a Timed Loop. The default is FALSE.|
|replace replaces the timed structures in synchronization group name with the timed structures you enter in timed structure names. If replace is FALSE and the timing source is a member of another hierarchy, the VI returns an error.|
|synchronization group name is the name for the group of timed structures you want to synchronize.|
|timeout ms is the amount of time a timed structure waits on other members of the synchronization group to arrive at the synchronization point. If any of the timed structures in the group do not arrive in time, the timed structure returns an error. The default is 10,000 ms. A value of –1 indicates to wait indefinitely.|
|timed structure names specifies the names of the timed structures you want to synchronize. By default, the VI deletes the timed structure from its current group and adds it to the group you specify in synchronization group name. If you set replace to FALSE and a timed structure you specify in timed structure names is a member of another group, the VI returns an error to indicate that it could not add the timed structure to the synchronization group.|
|error in (no error) describes error conditions that occur before this node runs. This input provides standard error in functionality.|
|timed structures names out returns the names of all timed structures in the group after LabVIEW adds the names to the synchronization group you specify.|
|error out contains error information. This output provides standard error out functionality.|
Use this VI only with timed structures configured to use either the 1 kHz Clock timing source or the 1 MHz Clock timing source. National Instruments does not recommend using this VI with absolute time timing sources, reset at structure start timing sources, the Synchronize to Scan Engine timing source, or any external timing source.
(Microprocessor SDK) The clear and replace inputs are ignored in embedded VIs.
(ARM) The clear and replace inputs are ignored in ARM VIs.
(Blackfin) The clear and replace inputs are ignored in Blackfin VIs.
Refer to the Synchronizing the start of timed loops VI in the labview\examples\general\timedloop.llb for an example of using the Synchronize Timed Structure Starts VI.