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A Conditional Disable structure executes one subdiagram depending on the configuration of the condition, which can include the platform and other user-defined symbols.
Complete the following steps to configure conditions for a Conditional Disable structure by selecting symbols and values.
|Specifies the processor on which the subdiagram executes. The VI must be in a LabVIEW project to access this symbol.|
Specifies to execute a different subdiagram within an FPGA VI depending on whether the execution mode is set to:
The VI must be under an FPGA target in a LabVIEW project to access this symbol.
|Specifies to execute a different subdiagram within an FPGA VI depending on the FPGA family, such as Virtex-II or Virtex-5. The VI must be under an FPGA target in a LabVIEW project to access this symbol.|
|FPGA_TARGET_CLASS||Refer to the Conditional Disable Symbols page of the FPGA Target Properties dialog box to find the value defined by the target.||Specifies the target class of the FPGA target. For example, the FPGA_TARGET_CLASS of the NI PXIe-7965R is PXIE-7965R and the FPGA_TARGET_FAMILY is VIRTEX5.|
|Specifies the OS on which the subdiagram executes. The VI must be in a LabVIEW project to access this symbol.|
|Specifies whether the subdiagram executes when you create a LabVIEW stand-alone application or shared library that uses the LabVIEW Run-Time Engine.|
|Specifies the bitness of the instance of LabVIEW or the LabVIEW Run-time Engine that executes the subdiagram.|
|Specifies on which platforms or which targets the subdiagram executes.|
|Note If you do not use the Conditional Disable structure in a LabVIEW project, RUN_TIME_ENGINE, TARGET_BITNESS, and TARGET_TYPE are the only symbols available.|
|Note You can join conditions through Boolean operators to create an expression that allows LabVIEW to evaluate multiple conditions. If more than one condition evaluates to TRUE, the first condition that evaluates to TRUE determines the active subdiagram for the structure. If you define a Boolean expression for a subdiagram, the symbol/value comparisons that you join through the AND operator are evaluated before symbol/value comparisons you join with the OR operator.|
If you want to disable a section of code on the block diagram so that it does not compile at run time, use the Diagram Disable structure.
Refer to the Conditional Disable Structure VI in the labview\examples\Structures\Disable Structures directory for an example of using Conditional Disable structures.