Configuring DRAM with FPGA Memory Items

NI R Series Multifunction RIO Device Drivers Help

Edition Date: May 2018

Part Number: 371508V-01

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Use the FPGA memory item interface to use DRAM in the same way that you use block memory and look-up tables (LUT). DRAM memory items appear in the Project Explorer window under the FPGA target. The FPGA memory item interface allows you to partition the physical DRAM banks into multiple memory items. You can create target-scoped or VI-defined memory items. For more information about these different memory items, refer to the Using FPGA Memory topic.

Complete the following steps to configure DRAM with FPGA memory items.

  1. Determine whether you want to create a target-scoped memory item or a VI-defined memory item.
    • To create a target-scoped memory item, which you can access in the entire FPGA VI hierarchy, right-click the FPGA target in the Project Explorer window and select New»Memory from the shortcut menu. The Memory Properties dialog box appears.
    • To create a VI-defined memory item, place a VI-defined Memory Configuration node on the block diagram, right-click the node, and select Configure from the shortcut menu. The Memory Properties dialog box appears.
    note Note  A memory item targets a single DRAM bank. If you only select one memory item, this memory item can be as large as the entire bank. You can use memory items to divide the full DRAM space into smaller memories that you can access independently from different sections of the LabVIEW FPGA code. The figure below shows the logic that LabVIEW generates to provide access to a DRAM bank.

    DRAM selection

  2. Configure the memory item in the Memory Properties dialog box. Click OK. The memory item is now populated in the Project Explorer window under the target.
note Note  If you use a Memory Method Node in a single-cycle Timed Loop, make sure the corresponding arbitration option is Arbitrate if Multiple Requestors Only or Never Arbitrate.
  1. Use the memory item in an FPGA VI.

Related Topics

Using DRAM Effectively with NI R Series Multifunction RIO


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