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General-purpose I/O (GPIO)—You can individually configure each line as an input or output. Each of these lines has a 10 kΩ pull-down resistor when used for GPIO. Outputs can be driven high to 3.3 V or low to ground.
Exported signal output—Each line can export the MSO Trigger or FGEN Start signal. When importing a trigger, the mixed signal oscilloscope (MSO) can display the signal present on the digital I/O connector as a digital channel as well as use it as a trigger for the acquisition. When exporting a trigger, these options are available:
SPI bus mastering—You can use VirtualBench’s digital I/O to interface to serial peripherals. When you configure a SPI bus, a set of lines are reserved for the bus and each line's direction is automatically configured.
dig/0: Clock output
dig/1: MOSI (Master Out Slave In)
dig/2: MISO (Master In Slave Out)
dig/3: CS (Chip Select) output
I2C bus mastering—You can use VirtualBench to master an I2C (Inter-Integrated Circuit) bus. When you configure an I2C bus, a set of lines are reserved for the bus and each line's direction is automatically configured. By default, all the GPIO lines have a 10 kΩ pull-down resistor connected. When used in I2C mode, they can be configured to have a pull-up instead. On the VB-8012, this pull-up has a value of 10 kΩ. On the VB-8034/8054, it is a value of 1.5 kΩ.
dig/6: SCL (Serial Clock) output
dig/7: SDA (Serial Data) input/output