FPGA Module VIs and Functions

FPGA I/O Node
FPGA I/O Method Node
FPGA I/O Property Node
HDL Interface Node
Interrupt
Memory Read
Memory Write

FPGA Math & Analysis VIs

Look-Up Table 1D
Sine Generator
Control VIs

Discrete Linear Systems VIs

Discrete Control Filter
Discrete Delay
Discrete Normalized Integrator
Discrete PID
Initial Condition
Unit Delay
Zero-Order Hold

Nonlinear Systems VIs

Backlash
Boolean Crossing
Dead Zone
Friction
Memory Element
Quantizer
Rate Limiter
Relay
Saturation
Switch
Trigger
Zero Crossing

Saturation Arithmetic VIs

Saturation Add
Saturation Multiply
Saturation Subtract

Utilities VIs

Boolean Crossing
Discrete Delay
Linear Interpolation
Saturation
Unit Delay
Zero Crossing

Numeric Functions

Conversion Functions
Data Manipulation Functions
Saturation Arithmetic VIs

Saturation Add
Saturation Multiply
Saturation Subtract

Structures

Timed Structures

Timed Loop (FPGA Module)

Synchronization Functions

FIFO Operations Functions

FIFO Read
FIFO Write

Occurrences Functions

Timing VIs

Loop Timer

 

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