Managing FPGA Applications in the Project Explorer Window (FPGA Module)

Use the Project Explorer window to manage the components of an FPGA application, including the FPGA VI and host VI, the FPGA target, and target-specific options, such as FPGA I/O, FPGA FIFOs, and FPGA target clocks. The figure below shows the Project Explorer window with an FPGA target, an FPGA I/O item, an FPGA base clock and derived clock, an FPGA VI, a FIFO, and a host VI.

You must create projects for FPGA VIs and host VIs. Create a project by clicking the Empty Project link in the Getting Started window or by selecting File»New in LabVIEW and Project»Empty Project in the New dialog box. You now can add FPGA targets, FPGA target clocks, FPGA I/O, and FPGA FIFOs in the project. You can select an FPGA target you previously configured in the NI Measurement & Automation Explorer (MAX) or you can create a new FPGA target. You can add, configure, and manage VIs, folders, and FPGA project items below FPGA targets in the Project Explorer window.

Note  If you change an item under an FPGA target that you use in an FPGA VI, such as a subVI or an FPGA I/O item, you must recompile all the VIs under the target.

Using Target-Specific Functionality

Each item below the FPGA target in the Project Explorer window contains FPGA target-specific information and functionality. When you select an item below an FPGA target in the Project Explorer window, LabVIEW displays only options available for the specific FPGA target. For example, if you select an FPGA VI below an FPGA target in the Project Explorer window and view the block diagram, LabVIEW displays only the subpalettes, VIs, and functions on the Functions palette that the FPGA target supports.

Managing Multiple FPGA Targets

You can reuse items among different FPGA targets in a Project Explorer window. However, the new FPGA target might not support the same functionality as the previous FPGA target, so you must update the item properties to match the functionality and resources of the new FPGA target. For example, if you copy an FPGA I/O item between two different FPGA targets, you must verify the FPGA target to which you copied the FPGA I/O item supports the same I/O resource to which the FPGA I/O item was assigned in the first FPGA target.

 

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