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FPGA Module VIs and Functions



Structures

Decorations
Timed Structures

Timed Loop (FPGA Module)

Array Functions
Cluster & Variant Functions
Numeric Functions

Conversion Functions
Data Manipulation Functions
Saturation Arithmetic VIs

Saturation Add
Saturation Multiply
Saturation Subtract

Boolean Functions
Comparison Functions
Timing VIs

Loop Timer
Tick Count
Wait

FPGA I/O Functions

FPGA I/O Node
FPGA I/O Method Node
FPGA I/O Property Node

Memory & FIFO Functions

FIFO Read
FIFO Write
Memory Read
Memory Write
VI-Scoped FIFO
VI-Scoped Memory

FPGA Math & Analysis VIs

Butterworth Filter
DC and RMS Measurements
Look-Up Table 1D
Analog Period Measurement
Sine Generator
Control VIs

Discrete Linear Systems VIs

Discrete Control Filter
Discrete Delay
Discrete Normalized Integrator
Discrete PID
Initial Condition
Unit Delay
Zero-Order Hold

Nonlinear Systems VIs

Backlash
Boolean Crossing
Dead Zone
Friction
Memory Element
Quantizer
Rate Limiter
Relay
Saturation
Switch
Trigger
Zero Crossing

Saturation Arithmetic VIs

Saturation Add
Saturation Multiply
Saturation Subtract

Utilities VIs

Boolean Crossing
Discrete Delay
Linear Interpolation
Saturation
Unit Delay
Zero Crossing

Synchronization Functions

Interrupt
FIFO Functions

FIFO Read
FIFO Write
VI-Scoped FIFO

Occurrences Functions

Wait on Occurrence with Timeout in Ticks

Advanced

HDL Interface Node