You are here: NI Home > Support > Product Reference > Manuals > LabVIEW FPGA Module 8.2 Help

Owning Palette: Control VIs

Use the Discrete Linear Systems VIs to control or model discrete linear systems on FPGA targets.

Note  This palette is specific to FPGA targets.

Palette Object	Description
Discrete Control Filter	Applies a fifth-order low-pass integer FIR filter to the input data. The filter cut-off frequency is 1/10 of the sample frequency of the input. Use the Discrete Control Filter VI to filter measured values, such as the process variable, in control applications.
Discrete Delay	Delays the input value for the number of loop iterations you specify in the Configure Discrete Delay dialog box.
Discrete Normalized Integrator	Integrates a discrete input signal using forward Euler integration. The VI assumes that the integration interval (dt) is normalized to 1. The larger data type you wire to input or initial condition determines the polymorphic instance LabVIEW uses.
Discrete PID	Implements an integer PID algorithm for simple PID applications or high-speed control applications that require an efficient algorithm. The PID algorithm features control output range limiting with integrator anti-windup. The PID algorithm also features bumpless controller output for PID gain changes.
Initial Condition	Produces a predefined initial condition immediately after the first time you call or initialize the VI. The larger data type you wire to input or initial condition determines the polymorphic instance LabVIEW uses.
Unit Delay	Delays the input value for one cycle.
Zero-Order Hold	Samples an input signal and holds it for a specified number of calls to the VI. The larger data type you wire to input or initial condition determines the polymorphic instance LabVIEW uses.