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Butterworth Filter (FPGA Module)

LabVIEW FPGA Module 8.2 Help
August 2006

NI Part Number:
371599B-01

»View Product Info

Filters an input signal using an IIR Butterworth filter. The filter type can be highpass or lowpass and of order 1, 2, or 4. Details  

Dialog Box Options
Block Diagram Inputs
Block Diagram Outputs

Dialog Box Options

ParameterDescription
Filter SpecificationsContains the following options:
  • Type—Specifies whether the filter type is Lowpass or Highpass.
  • Order—Specifies the filter order. You can select 1 (first order), 2 (second order), or 4 (fourth order).
  • Expected sample rate (S/s)—Specifies the sample rate of the input signal. This Express VI uses the rate you specify to calculate the normalized cutoff frequency, which is Cutoff freq./Expected sample rate.

    Caution  The actual sample rate is specified elsewhere in the application. If the sample rate changes, you must change the Expected sample rate in this VI. Otherwise, this VI might not behave as expected.
  • Cutoff freq. (Hz)—Specifies the cutoff frequency of the filter. The allowable frequency range depends on the Expected sample rate you specify. The normalized cutoff frequency (Cutoff freq./Expected sample rate) must be less than 0.5, which corresponds to the Nyquist frequency.
ImplementationContains the following options:
  • Input resolution—Specifies the range of the input signal in number of bits. This option determines the data type of the input signal and allows LabVIEW to optimize the implementation. Contains the following options:

    • 16 bit—Input data is represented as a signed 16-bit integer.
    • 24 bit—Input data range is limited to 24 bits aligned to the least significant bit, although this Express VI represents the data as a signed 32-bit integer. Select 24 bit if the input data is from a 24-bit input module.
    • 32 bit—Input data is represented as a signed 32-bit integer and covers a range that is greater than 24 bits.
  • Show reset terminal—Specifies whether this Express VI includes a reset input on the block diagram to reset the filter at run time. You can save resources on the FPGA if you do not place a checkmark in the Show reset terminal checkbox.
Filter ResponseDisplays the actual magnitude response of the filter.

Block Diagram Inputs

ParameterDescription
resetResets the filter states to zero state if TRUE. This input is available only if you place a checkmark in the Show reset terminal checkbox on the configuration dialog box.
input dataSpecifies the input signal to filter. You can wire a 16- or 32-bit signed integer to this input depending on the Input resolution you specify in the configuration dialog box.

Block Diagram Outputs

ParameterDescription
output dataReturns the filtered signal.

Butterworth Filter Details

Refer to the Developer Zone for more information about the accuracy of the Butterworth Filter VI.


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