You are here: NI Home > Support > Product Reference > Manuals > LabVIEW FPGA Module 8.2 Help

You use the LabVIEW FPGA Compile Server to compile FPGA VIs. LabVIEW and the LabVIEW FPGA Compile Server have a client-server architecture, where LabVIEW is a client to the LabVIEW FPGA Compile Server. The client-server architecture allows you to disconnect LabVIEW from the LabVIEW FPGA Compile Server during a compile. You then can continue to use LabVIEW while the FPGA VI compiles. You must not modify the FPGA VI being compiled. To reconnect, you again run the FPGA VI. LabVIEW displays a compile report when the compile is complete. You can view the compile report if you are connected to the LabVIEW FPGA Compile Server. If the FPGA target you use supports Interactive Front Panel Communication, after you click the OK button in the Successful Compile Report window, LabVIEW embeds the new bitstream into the FPGA VI and downloads the bitstream to the FPGA. The FPGA VI then runs on the FPGA target and you can interact with it through the front panel window on the development computer.

The LabVIEW FPGA Compile Server launches automatically when you run an FPGA VI that is not compiled or that you modified since the last compile. LabVIEW converts the VI into intermediate files to send to the LabVIEW FPGA Compile Server. The LabVIEW FPGA Compile Server converts the intermediate files into a bitfile. LabVIEW saves the compiled bitfile in a subdirectory of the same directory in which you saved the project. When you run an FPGA VI using Interactive Front Panel Communication, LabVIEW automatically downloads the bitfile corresponding to the VI to the FPGA target.

Note  The availability of Interactive Front Panel Communication varies by FPGA target. Refer to the specific hardware documentation for information about using Interactive Front Panel Communication.

You can open a reference to a specific bitfile from host VIs with the Open FPGA VI Reference function for Programmatic FPGA Interface Communication. If you do not have the FPGA Module or you distribute an FPGA VI to a LabVIEW user without the FPGA Module, you must use the specific bitfile without the FPGA VI in the host VI. However, National Instruments recommends you open a reference to the FPGA VI rather than a specific bitfile for most applications.

The compile time depends on the size of the VI, the processor speed, and amount of memory in the computer on which you are compiling. National Instruments recommends at least 512 MB of memory for the LabVIEW FPGA Compile Server. If you have less memory, smaller block diagrams might compile quickly, but larger block diagrams might use large amounts of virtual memory, which can be very slow, and compiles can take over 10 times longer to complete.

The LabVIEW FPGA Compile Server does not close automatically. You can close it by clicking the Stop Server button.

Compiling on a Remote Computer

You can install the LabVIEW FPGA Compile Server on a remote computer. You might want to do this if the development computer is slow and does not have enough memory to compile for the FPGA target. By default, LabVIEW assumes the LabVIEW FPGA Compile Server is installed on the local computer. To select a remote LabVIEW FPGA Compile Server, select Tools»FPGA Module Options and click the Configure button to display the Configure Compile Settings dialog box. Enter the name or IP address and server port of the remote computer running the LabVIEW FPGA Compile Server. Depending on the network, you also might need to increase the network timeout.

Launch the LabVIEW FPGA Compile Server manually on the remote computer by selecting Start»All Programs»National Instruments» LabVIEW»LabVIEW FPGA Utilities»Compile Server. You must launch the LabVIEW FPGA Compile Server manually when you configure LabVIEW clients on other computers to connect to the remote computer for compiling.

Managing Compilation Files

The LabVIEW FPGA Compile Server stores all files it uses to compile a VI in a directory. Configure the directory by clicking the Configure button in the LabVIEW FPGA Compile Server window. Click the Compile List button to view the compile history and delete compile files you no longer need. Typically, you do not need compile files after the bitstream is embedded in the FPGA VI. Delete the contents of X:\NIFPGA82\clntTmp and X:\NIFPGA82\srvrTmp, where X is the drive on which you installed LabVIEW and the FPGA Module, to save space on the hard drive.