Creating FPGA VIs (FPGA Module)
This book describes how to create an FPGA VI for an FPGA target, including how to perform common tasks such as I/O, timing, and triggering, as well as more advanced tasks such as using parallel operations.
Programming for FPGA Targets
The LabVIEW FPGA Module provides the same graphical programming environment for the creation of FPGA VIs as LabVIEW does for standard VIs. The LabVIEW graphical programming environment includes front panel and block diagram windows, powerful editing tools, and a wide range of included VIs and functions.
You must include FPGA targets and FPGA VIs in LabVIEW projects. When you edit a VI under an FPGA target in the Project Explorer window, you have access only to the LabVIEW VIs and functions that make sense on the FPGA target. For example, a typical FPGA target does not have access to a disk drive, so File I/O functions are not available on the Functions palette when you edit an FPGA VI for that target. In addition to the subset of the standard LabVIEW VIs and functions, the FPGA Module provides FPGA target-specific VIs and functions.
Utilizing FPGA Space
Every function or VI you place on the block diagram of an FPGA VI uses a certain number of logic cells on the FPGA. The FPGA on the FPGA target has a fixed number of logic cells. If the FPGA VI design exceeds the number of available logic cells, you must reduce the number of logic cells the FPGA VI uses on the FPGA. This book contains information throughout to help you minimize the size of FPGA VIs. Refer to Optimizing FPGA VIs for Speed and Size for more information about optimization.
When you compile the VI, LabVIEW displays a compile report that includes the FPGA resource usage. Refer to Using the LabVIEW FPGA Compile Server for more information.
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