Limiting the Number of Front Panel Objects in FPGA VIs (FPGA Module)
To decrease the amount of space the FPGA VI uses, reduce the number of front panel controls and indicators on the top-level FPGA VI. Each front panel object and the data it represents consumes a significant amount of space on the FPGA because LabVIEW includes additional logic to communicate between the top-level VI and the host VI. Front panel objects in subVIs do not consume space on the FPGA.
Limiting Arrays
Arrays consume significant amounts of space on the FPGA. Consider replacing arrays with FIFOs or memory items to transfer data.
Using Global Variables
If you do not need to access front panel controls and indicators from a host VI, consider replacing the controls and indicators with global variables to pass data within an FPGA VI. If you do not need to pass data, consider replacing controls with constants to decrease the amount of space the FPGA VI uses.
Bitpacking Data Types
To reduce the number of front panel objects, you might be able to combine objects, as shown in the following figure.
In the figure above, each Boolean control on the top-level FPGA VI contains extra logic that consumes space on the FPGA. However, if you use a single 8-bit numeric control to represent the data, only one control contains extra logic. You can use the Number to Boolean Array and Index Array functions to access elements of the numeric control.
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