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You can create and configure FPGA derived clocks in the Project Explorer window. Complete the following steps to configure FPGA derived clocks.

Note  Support of FPGA derived clocks varies by FPGA target. Refer to the specific FPGA target hardware documentation for more information.

1. Create an FPGA derived clock.
2. Right-click the FPGA derived clock in the Project Explorer window and select Properties from the shortcut menu to display the FPGA Derived Clock Properties dialog box.
3. Type the frequency at which you want the derived clock to run in the Desired Derived Frequency text box or enter values in the Multiplier and Divisor text boxes and read the resulting Message text. If the FPGA target supports the Derived Frequency in the Actual Derived Configuration section, the Message text box displays Valid Configuration.
4. Click the OK button. The FPGA derived clock appears in the Project Explorer window with the derivation ratio in parentheses.