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You can copy, cut, or paste an FPGA VI among multiple FPGA targets to create additional target-specific application instances of the FPGA VI. You also can copy, cut, and paste FPGA I/O items, FPGA clocks, FPGA FIFOs, and FPGA memory items among multiple FPGA targets in the Project Explorer window. A copy of the item appears in the Project Explorer window under the FPGA target you select. Support of FPGA items vary by FPGA target. Refer to the specific FPGA target hardware documentation for more information.

Tip  You also can drag and drop FPGA VIs and FPGA items in the Project Explorer window to create copies under multiple FPGA targets.

You also can create additional instances of FPGA VIs and copy FPGA items across LabVIEW projects. Open the projects you want to copy among and copy or drag the FPGA item from one project to another project.

Reusing FPGA VIs

You can use the same FPGA VI under multiple FPGA targets of the same or different classes, as long as the FPGA target supports all FPGA I/O items, FPGA clocks, or FPGA FIFOs used in the FPGA VI. Because FPGA VI features vary by FPGA target, you can compile and run the FPGA VI instance on some FPGA targets but not on others. If you copy an FPGA VI that uses FPGA I/O items, clocks, or FIFOs to an FPGA target, copy the additional items with the FPGA VI. Otherwise, the Run button of the FPGA VI appears broken and you cannot compile and run the VI.

Note  When you create an instance of an FPGA VI, LabVIEW refers to the same file on disk for each instance of the FPGA VI. If you make changes in one application instance of the FPGA VI, the Synchronize with Other Application Instances toolbar button appears. Click the Synchronize with Other Application Instances button to apply changes to all instances of the FPGA VI. You can use Save As to create copies of the FPGA VI that do not refer to the same file on disk.

Reusing FPGA I/O Items

You can copy FPGA I/O items among multiple FPGA targets. If the new FPGA target does not support the I/O resource for which you configure the FPGA I/O item or if the I/O resource already is in use, the item appears with a white ! in a red circle in the Project Explorer window. Also, if you have an FPGA VI under the new FPGA target that includes an FPGA I/O Node on the block diagram using the unsupported FPGA I/O item, the Run button appears broken and you cannot compile or run the VI. If the FPGA I/O item is broken, right-click the FPGA I/O item in the Project Explorer window and select Select Resource from the shortcut menu to display the Select Resource dialog box. Select an I/O resource that the FPGA target supports from the Select Resource dialog box and click the OK button. You also can right-click the FPGA I/O item in the Project Explorer window and select Remove from the shortcut menu to remove the item from the project. You then must reconfigure the FPGA I/O Node.

Reusing FPGA Clocks

You can copy FPGA clocks among multiple FPGA targets. If the new FPGA target does not support the clock resource for which you configure the FPGA clock or if the clock resource already is in use, the FPGA clock appears with a white ! in a red circle in the Project Explorer window. Also, if you have an FPGA VI under the new FPGA target that includes a single-cycle Timed Loop on the block diagram using the unsupported FPGA clock, the Code Generation Errors window appears and displays an error if you attempt to compile and run the VI. If the FPGA clock is broken, right-click the FPGA clock in the Project Explorer window and select Properties from the shortcut menu to display the FPGA Base Clock Properties dialog box or the FPGA Derived Clock Properties dialog box. If you copy an FPGA base clock, you can select a clock resource that the FPGA target supports from the Resource pull-down menu in the FPGA Base Clock Properties dialog box. If you copy an FPGA derived clock, you can select a clock configuration that the FPGA targets supports by configuring the FPGA derived clock. You also can right-click the FPGA clock in the Project Explorer window and select Remove from the shortcut menu to remove the FPGA clock from the project. You then must reconfigure the single-cycle Timed Loop using the new FPGA clock.

Reusing FPGA FIFOs

You can copy FPGA FIFOs among multiple FPGA targets. If the new FPGA target does not support the FPGA FIFO you copy, the Code Generation Errors window or the Compilation Failure dialog box returns a report that the compilation failed when you compile the FPGA VI. You can right-click the FPGA FIFO in the Project Explorer window and select Properties from the shortcut menu to display the FPGA FIFO Properties dialog box. You then can configure the FPGA FIFO and compile the FPGA VI again. You also can right-click the FPGA FIFO in the Project Explorer window and select Remove from the shortcut menu to remove the FPGA FIFO from the project.

Reusing FPGA Memory Items

You can copy memory items among multiple FPGA targets. If the new FPGA target does not support the memory item you copy, the Compilation Failure dialog box returns a report that the compilation failed when you compile the FPGA VI. You can right-click the memory item in the Project Explorer window and select Properties from the shortcut menu to display the Memory Properties dialog box. You then can configure the memory item and compile the FPGA VI again. You also can right-click the memory item in the Project Explorer window and select Remove from the shortcut menu to remove the memory item from the project.