Compiling an FPGA VI can take minutes to hours. You can test the logic of an FPGA VI before compiling it by running the FPGA VI on an FPGA target emulator. When you run an FPGA VI with an emulator, the FPGA VI runs on the development computer, and LabVIEW generates random data for the inputs or downloads a pre-compiled emulation VI to the FPGA target to provide I/O. If you use I/O from the FPGA target, LabVIEW communicates with the emulation VI on the FPGA target while both VIs run.
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Note You must have support for an FPGA target installed to use an emulator. The availability of the emulator varies by FPGA target. Refer to the specific FPGA target hardware documentation for information about emulator support. |
Complete the following steps to use an emulator to test an FPGA VI.
You can use all traditional LabVIEW debugging techniques, such as probes, execution highlighting, breakpoints, and single-stepping. You cannot test certain behavior, such as timing and determinism, with an emulator because the FPGA VI runs on the host computer instead of the FPGA.