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Refer to the LabVIEW 8.2 Features and Changes topic for information about new features in LabVIEW 8.2.

Refer to the readme_fpga.html file in the LabVIEW 8.2\readme directory for information about known issues with the FPGA Module 8.2.

FPGA Module 8.2 Features

The FPGA Module 8.2 includes the following new features to help you better manage and implement the components of an FPGA application.

• Enhanced Support for FPGA Memory—In the FPGA Module 8.0 and earlier, you can access up to 16 KB of memory on the FPGA using the Memory Read and Memory Write functions. In the FPGA Module 8.2, you can access all available memory on the FPGA using memory items with the Memory Read and Memory Write functions. You can create target-scoped or VI-scoped memory items to store and retrieve data.
• High Speed Data Transfer from Host to FPGA Target Using DMA FIFOs—The FPGA Module 8.2 includes support for writing to DMA FIFOs from host VIs. When you create a DMA FIFO in the FPGA FIFO Properties dialog box, select Host to Target—DMA from the Type pull-down menu. In the host VI, use the Invoke Method function with the Write method to write to the DMA FIFO.
• New FPGA Math & Signal Processing VIs—The FPGA Module 8.2 includes the following new VIs: Butterworth Filter, DC and RMS Measurements, and Analog Period Measurement.
• Improved FPGA Code Reuse with VI-Scoped FIFOs—The FPGA Module 8.2 includes VI-scoped FIFOs, which are available only within the VI in which they reside. Use VI-scoped FIFOs to pass data within a VI.
• Support for 64-bit Integers—The FPGA Module 8.2 introduces support for 64-bit integers. You can use 64-bit signed and unsigned integers with all arithmetic operations and comparisons, the Saturation Arithmetic VIs, memory, and the HDL Interface Node.
• Improved Saturation Arithmetic VIs—In the FPGA Module 8.0 and earlier, you must use the configuration dialog box to select the data type for inputs on the Saturation Arithmetic VIs. In the FPGA Module 8.2, you can wire 8-, 16-, 32-, and 64-bit data types directly to the inputs of the Saturation Add and Saturation Subtract VIs without using the configuration dialog box. You can wire 8-, 16-, and 32-bit data types directly to the inputs of the Saturation Multiply VI without using the configuration dialog box.
• HDL Interface Node Enhancements—The HDL Interface Node is no longer limited to 28 input and output parameters. Also, the HDL Interface Node includes a new look, which displays the names of input and output parameters.
• Easier to Understand Code Generation Errors—In the FPGA Module 8.0 and earlier, the Code Generation Errors window usually refers to objects that contain errors using internal names, which makes it difficult to determine where and how to correct an error. In the FPGA Module 8.2, the Code Generation Errors window returns errors using the visible names of objects, provides suggestions for correcting the errors, and highlights the location of the errors. Click the Show Error button in the Code Generation Errors window to highlight the location of the error in the VI or Project Explorer window.
• Resolving Timing Violations in Single-Cycle Timed Loops—The FPGA Module 8.2 returns additional information about compilation failures due to timing violations. LabVIEW cannot always detect the location of the violation. If LabVIEW can detect the location of the violation and the violation occurs within a single-cycle Timed Loop, the Compilation Failure dialog box returns the name of the single-cycle Timed Loop. You can use this information to identify where you need to make changes in the FPGA VI to resolve the violation.

Upgrade and Compatibility Issues

Refer to the following sections for upgrade and compatibility issues specific to different versions of the FPGA Module.

Upgrading from FPGA Module 8.0

• Memory Read and Memory Write Functions—If you use the Memory Read or Memory Write functions in an FPGA VI from LabVIEW 8.0 or earlier, the FPGA Module 8.2 does not update the Memory Read and Memory Write functions to 8.2 functionality. All Memory Read and Memory Write functions from 8.0 or earlier continue to work in the FPGA Module 8.2.
  
  If you created memory blocks using the FPGA Module Memory Extension Utility on ni.com, the FPGA Module 8.2 does not convert the memory blocks to use an 8.2 memory item. The memory blocks continue to work in the FPGA Module 8.2. However, the memory blocks might not be supported in a future release of the FPGA Module. To replace a memory block, create a new memory item with the same configuration as the memory block and configure the Memory Read or Memory Write functions to access the new memory item.
• Wait on Occurrence Function—In the FPGA Module 8.0 and earlier, when you use the Wait on Occurrence function in an FPGA VI, the function uses ticks as the unit for the ms timeout parameter. When you use the Wait on Occurrence function in a Windows VI, the unit is milliseconds. In the FPGA Module 8.2, the Wait on Occurrence function uses milliseconds in both FPGA and Windows VIs. The FPGA Module 8.2 also includes a new Wait on Occurrence with Timeout in Ticks function.
  
  When you open an FPGA VI that is saved in LabVIEW 8.0 or earlier in the application instance for an FPGA target, the FPGA Module 8.2 replaces the Wait on Occurrence function with the new Wait on Occurrence with Timeout in Ticks function. If you use the Import FPGA Files from LabVIEW FPGA Module 1.X utility, the FPGA Module 8.2 replaces the Wait on Occurrence function with the new Wait on Occurrence with Timeout in Ticks function.
• Tunnels and Shift Registers on For Loops—In the FPGA Module 8.0 and earlier, if the value wired to the count (N) terminal on a For Loop is 0, the outputs from the tunnels and shift registers are undefined. In the FPGA Module 8.2, the output tunnels and shift register terminal on the right side of the For Loop contain an extra MUX to handle a 0 value wired to the count terminal in a manner consistent with LabVIEW for Windows. As a result, FPGA VIs that use the output tunnels or right shift register terminal in a For Loop might use more FPGA resources and/or compile at a slightly lower clock rate.

Upgrading from FPGA Module 1.x

Refer to ni.com/info and enter the info code ex8kk4 for more information about how to perform FPGA Module 1.x tasks with the FPGA Module 8.2.

• FPGA Device I/O Functions—The FPGA Module no longer supports the FPGA Device I/O functions. Use the FPGA I/O Node configured to target-specific I/O resources instead.
• Embedded Project Manager—The FPGA Module no longer supports the Embedded Project Manager. Use the Project Explorer window instead.
• Upgrading FPGA VIs, Host VIs, and Embedded Projects from the LabVIEW FPGA Module 1.x to 8.2—Refer to Upgrading FPGA VIs, Host VIs, and Embedded Projects from the LabVIEW FPGA Module 1.x to 8.2 for information about upgrading files you create with the FPGA Module 1.x.