FIFO Clear (FPGA Module)
Clears a target-scoped or VI-scoped FIFO on the FPGA. You cannot use the FIFO Clear function with DMA FIFOs. To clear DMA FIFOs from the host VI, use the Stop method on the Invoke Method function.
FIFO Clear Details
Right-click the FIFO Clear function and select the FIFO you want to clear from the Select FIFO shortcut menu. To use the FIFO Clear function in the block diagram dataflow, include the function in a Flat Sequence or Stacked Sequence structure. You also can control the dataflow by using the error terminals to wire the function to other objects on the block diagram.
Special Considerations for Single-Cycle Timed Loops
You cannot use the FIFO Clear function inside a single-cycle Timed Loop. However, when FIFOs are configured as Block Memory, you can place the FIFO Clear function in the top-level clock domain, even if the top-level clock domain is different than the clock domain(s) specified by the single-cycle Timed Loop(s) in which the FIFO Write and FIFO Read functions are placed.
Error Handling Details
The FIFO Clear function does not return errors. Consider adding error terminals to maintain the error chain. Right-click the FIFO Clear function on the block diagram and select Show Error Terminals from the shortcut menu to add standard LabVIEW error in and error out parameters to the function.
 | Note Adding error in and error out parameters increases the amount of space the function uses on the FPGA target. The error in and error out parameters also can cause slower execution on the FPGA target. |