Calculates the DC (Mean) and/or RMS values of an input signal. You also can use this VI to calculate the intermediate Sum, Mean Square, and Square Sum values in order to save FPGA resources.
| Dialog Box Options |
| Block Diagram Inputs |
| Block Diagram Outputs |
| Parameter | Description | ||
|---|---|---|---|
| Measurement Time Setup | Contains the following options:
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| Windowing | Contains the following option:
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| Implementation | Contains the following option:
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| Measurements | Contains the following options:
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| Parameter | Description |
|---|---|
| reset | Resets the measurement process if TRUE. |
| input data | Specifies the input signal to measure. You can wire a 16- or 32-bit signed integer to this input depending on the Input resolution you specify in the configuration dialog box. |
| Parameter | Description |
|---|---|
| results valid | Specifies whether this Express VI returns valid measurement results. The output is TRUE once for every Actual number of measurement samples call to the VI. If TRUE, the values this Express VI returns are valid. If FALSE, the values this Express VI returns are equal to zero. |
| DC result | Returns the DC value of the input signal when results valid is TRUE. |
| Sum result | Returns the sum of the input samples when results valid is TRUE. |
| RMS result | Returns the RMS (Root Mean Square) value of the input signal when results valid is TRUE. |
| Mean Square result | Returns the mean value of the squared input samples when results valid is TRUE. |
| Square Sum result | Returns the sum of the squared input samples when results valid is TRUE. The representation of Square Sum result depends on the Input resolution you select in the configuration dialog box.
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The DC and RMS Express VI can calculate the DC and RMS values of an input signal. However, some of the operations for the calculation require significant FPGA resources. You can save FPGA resources by splitting the operations into two groups that run on the FPGA VI and the host VI, respectively. In the following calculations, you can perform the operations in bold in the host VI.
DC = Sum/Actual number of measurement samples
RMS = sqrt(Mean square)
RMS = sqrt(Square Sum/Actual number of measurement samples)
You also can save FPGA resources if Actual number of measurement samples is a power of two.
If you select 24 bit from the Input resolution menu but the input data is greater than 24 bits, overflow might occur for the RMS, Mean Square, and Square Sum measurements.
DC and RMS measurements contain common error sources.
Refer to the Developer Zone for more information about the accuracy of the DC and RMS Measurements VI.