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Sine Wave Generator (FPGA Module)

LabVIEW 8.5 FPGA Module Help
August 2007

NI Part Number:
371599C-01

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Generates a point-by-point sine wave using direct digital synthesis. The synthesis runs continuously from the top-level FPGA target clock to produce an accurate real-time frequency. Each execution of this VI returns the most recent sample produced by the underlying synthesis engine.

Details  

Dialog Box Options
Block Diagram Inputs
Block Diagram Outputs

Dialog Box Options

ParameterDescription
Sine ParametersContains the following options:
  • Frequency (Hz)—Determines the output frequency in Hz. The generation process runs continuously from the FPGA clock. Each call to the Sine Wave Generator Express VI samples the current output of the look-up table. If the Show increment terminal checkbox does not contain a checkmark, Frequency (Hz) determines the frequency of the sine output. If the Show increment terminal checkbox does contain a checkmark, Frequency (Hz) determines the default value of the phase increment input.
  • Amplitude—Determines the zero-to-peak amplitude of the output sine wave. The default is the full signed range of the Amplitude resolution you select.
  • Full scale—Selects the largest possible amplitude for the Amplitude resolution you select. If Full scale does not contain a checkmark, Amplitude resolution accommodates the Amplitude you select.
  • Phase offset (deg)—Specifies the phase in degrees of the signal the Sine Wave Generator Express VI returns relative to its initialization.
ImplementationContains the following options:
  • Look-up table size—Specifies the number of sine wave points LabVIEW stores in block memory on the FPGA target. Use the Power Spectrum Preview waveform graph to choose a Look-up table size that provides sufficient spurious free dynamic range for the application you create. LabVIEW coerces the Look-up table size you select to the nearest size supported by the FPGA target for the Amplitude resolution you select. For example, if you select an Amplitude resolution of 16 bits, the smallest Look-up table size you can use is 1024.
  • Use linear interpolation—Provides a more accurate sine output by using remaining phase accumulator bits as a fractional index into the look-up table. However, if you place a checkmark in the Use linear interpolation checkbox, you increase latency and FPGA usage. The result of the VI calculation is a 32-bit number. The VI truncates the lower 16 bits to return Sine out.
  • Amplitude resolution—Specifies the output data type of the sine wave. You can choose 8-, 16-, or 32-bit signed integers.
  • FPGA clock rate (MHz)—Specifies the design clock rate at which the LabVIEW FPGA Compile Server builds the Sine Wave Generator Express VI. If the FPGA clock rate parameter does not match the top-level clock rate, the Code Generation Errors window returns an error when you compile. Use the Top-Level Clock FPGA Target Properties page to change the top-level clock rate.
  • Use top-level clock—Populates FPGA clock rate (MHz) with the frequency of the currently configured top-level FPGA target clock. If you do not use the Sine Wave Generator Express VI in an FPGA VI under an FPGA target in the Project Explorer window, LabVIEW uses the default value of 40 MHz for the FPGA clock rate (MHz).
  • Phase increment—Displays the 32-bit integer that corresponds to the Frequency (Hz) you select. If you place a checkmark in the Show increment terminal checkbox, you can use Phase increment to verify the programmatic phase increment input is correct.
  • Phase offset—Displays the 32-bit integer that corresponds to the initial phase of the sine wave.
  • Show increment terminal—Creates a phase increment input on the Sine Wave Generator Express VI. The Frequency (Hz) determines the default value of the phase increment input. If you do not place a checkmark in the Show increment terminal checkbox, the phase increment input is fixed at the value corresponding to the frequency you specify in Frequency (Hz).
  • Show offset terminal—Creates a phase offset input on the Sine Wave Generator Express VI. Phase offset (deg) determines the default value of the phase offset input. If you do not place a checkmark in the Show offset terminal checkbox, the phase offset input is fixed at the value corresponding to the frequency you specify in Phase offset (deg).
  • Output sine and cosine—Creates a cosine out output on the Sine Wave Generator Express VI, offset by 90 degrees from the sine out output. You cannot use linear interpolation if you place a checkmark in the Output sine and cosine checkbox.
Power Spectrum PreviewDisplays a preview of the configured signal power spectrum. The peak corresponding to the configured frequency is normalized to 0 dB. The next highest peak in the spectrum gives an estimate of the spurious free dynamic range resulting from the configured implementation parameters. Refer to the NI Developer Zone for information about the spurious free dynamic range.

Block Diagram Inputs

ParameterDescription
initializeSets the VI to the initial state determined by phase offset. The VI initializes automatically when it first runs.
phase increment(Optional) Specifies the frequency of the sine wave according to the following formula.

phase increment = [(frequency / FPGA clock rate) * 232]

[ ] = rounded to the nearest integer

The output frequency depends on the top-level FPGA target clock rate. Verify the top-level FPGA target clock rate is set in the Top-Level Clock FPGA Target Properties page before you configure the Sine Wave Generator Express VI. The default corresponds to the value of Frequency (Hz) you enter in the Configure Sine Wave Generator dialog box. The step size through a 32-bit accumulator determines the frequency. The upper n bits specify the address of the sine point in a 2n element look-up table. Place a checkmark in the Show increment terminal checkbox in the Configure Sine Wave Generator dialog box to add this parameter to the VI connector pane on the block diagram.
phase offset(Optional) Specifies the initial phase of the sine wave according to the following formula.

phase offset = [(phase offset (deg) / 360) * 232]

[ ] = rounded to the nearest integer

The default corresponds to the value of Phase offset (deg) that you enter in the Configure Sine Wave Generator dialog box. Place a checkmark in the Show offset terminal checkbox in the Configure Sine Wave Generator dialog box to add this parameter to the VI connector pane on the block diagram.

Block Diagram Outputs

ParameterDescription
sine outReturns a signed 8-, 16-, or 32-bit integer containing the sine output point.
cosine out(Optional) Returns a signed 8-, 16-, or 32-bit integer containing the sine output point offset by 90 degrees.

Sine Wave Generator Details

If you run the FPGA VI with an FPGA target emulator, the Sine Wave Generator Express VI outputs every point of the generated sine wave, regardless of the rate at which LabVIEW calls the VI. To produce the same data when you run the FPGA VI with an FPGA target emulator as when you run the FPGA VI on an FPGA target, change phase increment to take into account the rate at which the FPGA VI calls the Sine Wave Generator VI. The following equation determines the correction for using an FPGA target emulator.

phase increment (emulation) = phase increment (FPGA) * FPGA loop time (ticks)


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