Configure Server Dialog Box (FPGA Module)
Click the Configure button in the LabVIEW FPGA Compile Server window to display the Configure Server dialog box.
Use this dialog box to configure the directory structure and settings that the LabVIEW FPGA Compile Server uses during compilation.
This dialog box includes the following components:
- Compiler path—Sets the path to the directory containing the Xilinx compile tools. If you customized the installation of the FPGA Module or previously installed Xilinx software, modify the Compiler path if necessary. The compiler resides in the C:\NIFPGA82\Xilinx directory by default. Do not use spaces in the directory path. The Compiler Path must comply with the DOS 8.3 naming convention.
- Root build directory—Sets the path to the working directory of the server. The default is C:\NIFPGA82\srvrTmp. The server creates a new subdirectory under the root for each client. Typically, you do not need to modify the Root build directory. You might need to modify the Root build directory if the default conflicts with an existing directory on the compilation computer.
- Port—Sets the TCP/IP port used for communication between the client and server. The port specified must match the port specified in the Configure Compile Settings dialog box. Change the Port option if the default port, 96, conflicts with other ports on the network.
- Network timeout (ms)—Specifies the time, in milliseconds, that the server waits to receive information before timing out. Increasing the Network timeout (ms) option fixes some network errors that appear when sending or receiving files.
If you make changes to the settings in this dialog box and click the OK button, you must shut down and restart the LabVIEW FPGA Compile Server before the changes take effect.
Resources
- Importing HDL Code into FPGA VIs Using the HDL Interface Node- Developer Zone - NI Developer Zone
- Developing Custom Measurement and Control I/O Hardware with the LabVIEW FPGA Module and - NI Developer Zone
- Developing Measurement and Control Applications with the LabVIEW FPGA Module and Reconfigurable I/O - NI Developer Zone