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Refer to the LabVIEW 8.5 Features and Changes topic for information about new features in LabVIEW 8.5.

Refer to the FPGA Release and Upgrade Notes for a complete list of new features and changes, as well as information about upgrade and compatibility issues specific to different versions of the FPGA Module. Refer to the readme_fpga.html file in the LabVIEW 8.5\readme directory for information about known issues with the FPGA Module 8.5.

FPGA Module 8.5 Features

The FPGA Module 8.5 includes the following new features to help you better manage and implement the components of an FPGA application.

• Wizard for Creating New FPGA Projects—Use the FPGA Project Wizard to access any installed FPGA target wizards.
• Improved Code Reuse—The FPGA Module 8.5 includes the following features to help you create reusable subVIs:
  • FPGA I/O Controls—Use the FPGA I/O control to specify FPGA I/O items. You can wire the FPGA I/O control to the FPGA I/O Node, I/O Method Node, and I/O Property Node, all of which now include FPGA I/O In and FPGA I/O Out terminals. Use the FPGA I/O control to create reusable subVIs.
  • FPGA Clock Controls—Use the FPGA clock control to specify FPGA clocks. You can wire the FPGA clock control to the Source Name input terminal on the input node of the single-cycle Timed Loop. Use the FPGA clock control to create reusable subVIs.
  • Feedback Nodes—Use the Feedback Node anywhere on the block diagram to store data from a previous VI or loop execution. You can use the Feedback Node to create reusable subVIs and implement pipelining.
  • Reentrant Execution Enabled by Default—When you create a VI under an FPGA target using the LabVIEW FPGA Module 8.5, LabVIEW configures the FPGA VI for reentrant execution by default. Moving a VI to an FPGA target does not change the reentrant execution setting of the VI. Also, adding a VI created using a previous version of the FPGA Module to an FPGA Module 8.5 project does not change the reentrant execution setting of the VI.
• New Signal Generation Express VIs—The FPGA Module 8.5 includes the new Square Wave Generator Express VI and White Noise Generator Express VI.
• Filtering Improvements—In the FPGA Module 8.5, the Butterworth Filter VI accepts multiple input channels. The FPGA Module 8.5 also includes the Notch Filter VI, which attenuates a specific frequency band in one or more input channels using a second-order IIR notch filter. Both filters also include optional configuration terminals that you can use to tune filter coefficients at run time. Both filters saturate output if the actual result of the calculation exceeds the range of the data type.
• Clearing FIFOs—You now can clear target-scoped and VI-scoped FIFOs from the block diagram of an FPGA VI using the FIFO Clear function.
• Improved Interrupt Handling—In the FPGA Module 8.5, you can wait on different interrupts from different places in a VI at the same time. Use calls to the Wait on IRQ and Acknowledge IRQ methods on the Invoke Node to implement concurrent waiting. National Instruments recommends that you specify non-overlapping interrupts for different calls to the Wait on IRQ method.
• Robust Handling of Multiple FPGA VI References in Host VIs—In the FPGA Module 8.2.x and earlier, if you open multiple references to FPGA VIs or bitfiles on the same target, the FPGA Module might cause erroneous behavior without returning any error messages. In the FPGA Module 8.5, you can simultaneously have more than one FPGA VI reference open on a target, as long as all the references correspond to the same FPGA VI or bitfile on the same target. If you attempt to open a reference to a different FPGA VI or bitfile on the same target without closing the reference to the original FPGA VI or bitfile, the FPGA Module now returns an error.
• Reconnecting to an FPGA VI Compilation—After you disconnect from a compilation, right-click the FPGA VI in the Project Explorer window and select Reconnect to Compilation from the shortcut menu to reconnect and view results of the compilation.
• Fixed-Point Data Type—The FPGA Module 8.5 supports the fixed-point data type. The fixed-point data type is a numeric data type that represents a subset of rational numbers within a user-specified range and of a user-specified precision. The data type settings can impact the resources on the FPGA.
• Additional Functions on the FPGA Numeric Functions Palette—The FPGA Numeric palette now includes the Square, Round to Nearest, Round Toward –Infinity, and Round Toward +Infinity functions, which support the fixed-point data type.
• Support for the LabVIEW Statechart Module—The FPGA Module 8.5 supports code generated by the LabVIEW 8.5 Statechart Module. Use the Statechart Module to create state-based applications in LabVIEW.
• Documentation Enhancements—The LabVIEW Help includes the following enhancements:
  • FPGA VI and Function Details book—This new book includes FPGA-specific details for many of the objects on the FPGA palettes. The details include Timed Loop compatibility, usage, timing, and resource considerations.
  • Optimizing FPGA VIs for Speed and Size book—This book includes additional content about optimizing FPGA VIs.
  • Getting Started with the FPGA Module topic—This new topic includes links to topics you might find useful based on your LabVIEW, FPGA Module, and hardware experience.